THIS SPEC IS OBSOLETE Spec No: 002-01233 Spec Title: S29AL008D, 8-MBIT (1M X 8-BIT/512K X 16- BIT), 3 V BOOT SECTOR FLASH Replaced by: NONES29AL008D 8-Mbit (1M x 8-Bit/512K x 16-Bit), 3 V Boot Sector Flash This product has been retired and is not recommended for designs. For new and current designs, S29AL008J supercedes S29AL008D. This is the factory-recommended migration path. Please refer to the S29AL008J data sheet for specifications and ordering information. Distinctive Characteristics Architectural Advantage Performance Characteristics Single Power Supply Operation High Performance 2.7 to 3.6 volt read and write operations for battery-powered Access times as fast as 55 ns applications Extended temperature range (-40C to +125C) Manufactured on 200 nm Process Technology Ultra-low Power Consumption (typical values at 5 MHz) Compatible with 0.32 m and 230 nm Am29LV800 devices 200 nA Automatic Sleep mode current Flexible Sector Architecture 200 nA standby mode current One 16-Kbyte, two 8-Kbyte, one 32-Kbyte, and fifteen 64-Kbyte 7 mA read current sectors (byte mode) 15 mA program/erase current One 8 Kword, two 4 Kword, one 16-Kword, and fifteen 32-Kword Cycling Endurance: 1,000,000 cycles per sector typical sectors (word mode) Data Retention: 20 years typical Supports full chip erase Reliable operation for the life of the system Sector Protection features: A hardware method of locking a sector to prevent any program or Package Option erase operations within that sector 48-ball FBGA Sectors can be locked in-system or via programming equipment 48-pin TSOP Temporary Sector Unprotect feature allows code changes in 44-pin SO previously locked sectors Unlock Bypass Program Command Software Features Reduces overall programming time when issuing multiple program Data Polling and Toggle Bits command sequences Provides a software method of detecting program or erase Top or Bottom Boot Block Configurations Available operation completion Embedded Algorithms Erase Suspend/Erase Resume Embedded Erase algorithm automatically preprograms and Suspends an erase operation to read data from, or program data erases the entire chip or any combination of designated sectors to, a sector that is not being erased, then resumes the erase Embedded Program algorithm automatically writes and verifies operation data at specified addresses Compatibility with JEDEC Standards Hardware Features Pinout and software compatible with single-power supply Flash Ready/Busy Pin (RY/BY ) Superior inadvertent write protection Provides a hardware method of detecting program or erase cycle completion Hardware Reset Pin (RESET ) Hardware method to reset the device to reading array data Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-01233 Rev. *B Revised January 24, 2017