S29GL01GS, S29GL512S S29GL256S, S29GL128S 1 Gbit (128 Mbyte), 512 Mbit (64 Mbyte), 256 Mbit (32 Mbyte), 128 Mbit (16 Mbyte), 3.0V GL-S Flash Memory General Description The Cypress S29GL01G/512/256/128S are MirrorBit Eclipse flash products fabricated on 65 nm process technology. These devices offer a fast page access time as fast as 15 ns with a corresponding random access time as fast as 90 ns. They feature a Write Buffer that allows a maximum of 256 words/512 bytes to be programmed in one operation, resulting in faster effective programming time than standard programming algorithms. This makes these devices ideal for todays embedded applications that require higher density, better performance and lower power consumption. Distinctive Characteristics CMOS 3.0 Volt Core with Versatile I/O Advanced Sector Protection (ASP) Volatile and non-volatile protection methods for each sector 65 nm MirrorBit Eclipse Technology Separate 1024-byte One Time Program (OTP) array with two Single supply (V ) for read / program / erase (2.7V to 3.6V) CC lockable regions Versatile I/O Feature Common Flash Interface (CFI) parameter table Wide I/O voltage range (V ): 1.65V to V IO CC Temperature Range x16 data bus Industrial (-40C to +85C) Asynchronous 32-byte Page read In-Cabin (-40C to +105C) 512-byte Programming Buffer 100,000 erase cycles for any sector typical Programming in Page multiples, up to a maximum of 512 bytes 20-year data retention typical Single word and multiple program on same word options Packaging Options Sector Erase 56-pin TSOP Uniform 128-kbyte sectors 64-ball LAA Fortified BGA, 13 mm x 11 mm Suspend and Resume commands for Program and Erase 64-ball LAE Fortified BGA, 9 mm x 9 mm operations 56-ball VBU Fortified BGA, 9 mm x 7 mm Status Register, Data Polling, and Ready/Busy pin methods to determine device status Performance Summary Maximum Read Access Times Random Access Time Page Access Time Density Voltage Range CE Access Time (t ) OE Access Time (t ) CE OE (t ) (t ) ACC PACC Full V = V 90 15 90 25 CC IO 128 Mb VersatileIO V 10025100 35 IO Full V = V 90 15 90 25 CC IO 256 Mb VersatileIO V 10025100 35 IO Full V = V 10015100 25 CC IO 512 Mb VersatileIO V 11025110 35 IO Full V = V 10015100 25 CC IO 1 Gb VersatileIO V 11025110 35 IO Typical Program and Erase Rates Maximum Current Consumption Buffer Programming (512 bytes) 1.5 MB/s Active Read at 5 MHz, 30 pF 60 mA Sector Erase (128 kbytes) 477 kB/s Program 100 mA Erase 100 mA Standby 100 A Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-98285 Rev. *I Revised March 04, 2016S29GL01GS, S29GL512S S29GL256S, S29GL128S Contents General Description ............................................................. 1 9.5 Capacitance Characteristics ......................................... 69 Distinctive Characteristics .................................................. 1 10. Timing Specifications................................................. 70 10.1 Key to Switching Waveforms ........................................ 70 Performance Summary ........................................................ 1 10.2 AC Test Conditions....................................................... 70 1. Product Overview ........................................................ 3 10.3 Power-On Reset (POR) and Warm Reset .................... 71 10.4 AC Characteristics ........................................................ 73 Software Interface 11. Physical Interface ....................................................... 84 2. Address Space Maps ................................................... 5 11.1 56-Pin TSOP................................................................. 84 2.1 Flash Memory Array....................................................... 6 11.2 64-Ball FBGA................................................................ 86 2.2 Device ID and CFI (ID-CFI) ASO................................... 7 11.3 56-Ball FBGA................................................................ 89 2.3 Status Register ASO...................................................... 8 2.4 Data Polling Status ASO................................................ 9 12. Special Handling Instructions for FBGA Package... 90 2.5 Secure Silicon Region ASO........................................... 9 13. Ordering Information.................................................. 91 2.6 Sector Protection Control............................................. 10 14. Other Resources......................................................... 94 3. Data Protection .......................................................... 11 14.1 Links to Software .......................................................... 94 3.1 Device Protection Methods.......................................... 11 14.2 Links to Application Notes............................................. 94 3.2 Command Protection ................................................... 11 14.3 Specification Bulletins................................................... 95 3.3 Secure Silicon Region (OTP)....................................... 11 14.4 Contacting Cypress....................................................... 95 3.4 Sector Protection Methods........................................... 12 15. Revision History.......................................................... 96 4. Read Operations ........................................................ 17 4.1 Asynchronous Read..................................................... 17 4.2 Page Mode Read......................................................... 17 5. Embedded Operations............................................... 18 5.1 Embedded Algorithm Controller (EAC)........................ 18 5.2 Program and Erase Summary ..................................... 19 5.3 Command Set.............................................................. 20 5.4 Status Monitoring......................................................... 30 5.5 Error Types and Clearing Procedures ......................... 35 5.6 Embedded Algorithm Performance Table.................... 39 6. Software Interface Reference ................................... 50 6.1 Command Summary.................................................... 50 6.2 Device ID and Common Flash Interface (ID-CFI) ASO Map 54 Hardware Interface 7. Signal Descriptions ................................................... 59 7.1 Address and Data Configuration.................................. 59 7.2 Input/Output Summary................................................. 59 7.3 Versatile I/O Feature.................................................... 59 7.4 Ready/Busy (RY/BY ) ............................................... 60 7.5 Hardware Reset........................................................... 60 8. Signal Protocols......................................................... 61 8.1 Interface States............................................................ 61 8.2 Power-Off with Hardware Data Protection................... 61 8.3 Power Conservation Modes......................................... 62 8.4 Read ............................................................................ 62 8.5 Write............................................................................. 63 9. Electrical Specifications............................................ 64 9.1 Absolute Maximum Ratings ......................................... 64 9.2 Latchup Characteristics ............................................... 64 9.3 Operating Ranges........................................................ 64 9.4 DC Characteristics....................................................... 67 Document Number: 001-98285 Rev. *I Page 2 of 101