S29GL064N, S29GL032N 64 Mbit, 32 Mbit 3 V Page Mode MirrorBit Flash Distinctive Characteristics Low power consumption Architectural Advantages 25 mA typical initial read current, Single power supply operation 1 mA typical page read current 50 mA typical erase/program current Manufactured on 110 nm MirrorBit process technology 1 A typical standby mode current Secured Silicon Sector region Package options 128-word/256-byte sector for permanent, secure identifica- 48-pin TSOP tion through an 8-word/16-byte random Electronic Serial Number, accessible through a command sequence 56-pin TSOP Programmed and locked at the factory or by the customer 64-ball Fortified BGA 48-ball fine-pitch BGA Flexible sector architecture 64Mb (uniform sector models): One hundred twenty-eight 32 Software and Hardware Features Kword (64 KB) sectors 64 Mb (boot sector models): One hundred twenty-seven 32 Software features Kword (64 KB) sectors + eight 4Kword (8KB) boot sectors Advanced Sector Protection: offers Persistent Sector Protec- 32 Mb (uniform sector models): Sixty-four 32Kword (64 KB) tion and Password Sector Protection sectors Program Suspend & Resume: read other sectors before pro- 32 Mb (boot sector models): Sixty-three 32Kword (64 KB) gramming operation is completed sectors + eight 4Kword (8KB) boot sectors Erase Suspend & Resume: read/program other sectors be- fore an erase operation is completed Enhanced VersatileI/O Control Data polling & toggle bits provide status All input levels (address, control, and DQ input levels) and outputs are determined by voltage on V input. V range is CFI (Common Flash Interface) compliant: allows host system IO IO 1.65 to V to identify and accommodate multiple flash devices CC Unlock Bypass Program command reduces overall multi- Compatibility with JEDEC standards ple-word programming time Provides pin out and software compatibility for single-power Hardware features supply flash, and superior inadvertent write protection WP /ACC input accelerates programming time (when high 100,000 erase cycles typical per sector voltage is applied) for greater throughput during system pro- duction. Protects first or last sector regardless of sector pro- 20-year data retention typical tection settings on uniform sector models Hardware reset input (RESET ) resets device Performance Characteristics Ready/Busy output (RY/BY ) detects program or erase cy- High performance cle completion 90 ns access time 8-word/16-byte page read buffer 25 ns page read time 16-word/32-byte write buffer which reduces overall program- ming time for multiple-word updates Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-98525 Rev. *B Revised May 26, 2017S29GL064N, S29GL032N General Description The S29GL-N family of devices are 3.0-Volt single-power Flash Device programming and erasure are initiated through memory manufactured using 110 nm MirrorBit technology. The command sequences. Once a program or erase operation S29GL064N is a 64-Mb device organized as 4,194,304 words begins, the host system need only poll the DQ7 (Data Polling) or 8,388,608 bytes. The S29GL032N is a 32-Mb device or DQ6 (toggle) status bits or monitor the Ready/Busy organized as 2,097,152 words or 4,194,304 bytes. Depending (RY/BY ) output to determine whether the operation is on the model number, the devices have 16-bit wide data bus complete. To facilitate programming, an Unlock Bypass mode only, or a 16-bit wide data bus that can also function as an 8-bit reduces command sequence overhead by requiring only two wide data bus by using the BYTE input. The devices can be write cycles to program data instead of four. programmed either in the host system or in standard EPROM Hardware data protection measures include a low V CC programmers. detector that automatically inhibits write operations during Access times as fast as 90 ns are available. Note that each power transitions. The hardware sector protection feature access time has a specific operating voltage range (V ) as disables both program and erase operations in any combination CC specified in the Product Selector Guide and the Ordering of sectors of memory. This can be achieved in-system or via InformationS29GL032N, and Ordering Information programming equipment. S29GL064N. Package offerings include 48-pin TSOP, 56-pin The Erase Suspend/Erase Resume feature allows the host TSOP, 48-ball fine-pitch BGA and 64-ball Fortified BGA, system to pause an erase operation in a given sector to read or depending on model number. Each device has separate chip program any other sector and then complete the erase enable (CE ), write enable (WE ) and output enable (OE ) operation. The Program Suspend/Program Resume feature controls. enables the host system to pause a program operation in a Each device requires only a single 3.0-Volt power supply for given sector to read any other sector and then complete the both read and write functions. In addition to a V input, a program operation. CC high-voltage accelerated program (ACC) feature provides The hardware RESET pin terminates any operation in shorter programming times through increased voltage on the progress and resets the device, after which it is then ready for a WP /ACC or ACC input. This feature is intended to facilitate new operation. The RESET pin may be tied to the system factory throughput during system production, but may also be reset circuitry. A system reset would thus also reset the device, used in the field if desired. enabling the host system to read boot-up firmware from the The device is entirely command set compatible with the JEDEC Flash memory device. single-power-supply Flash standard. Commands are written The device reduces power consumption in the standby mode to the device using standard microprocessor write timing. Write when it detects specific voltage levels on CE and RESET , or cycles also internally latch addresses and data needed for the when addresses are stable for a specified period of time. programming and erase operations. The Write Protect (WP ) feature protects the first or last sector The sector erase architecture allows memory sectors to be by asserting a logic low on the WP /ACC pin or WP pin, erased and reprogrammed without affecting the data contents depending on model number. The protected sector is still of other sectors. The device is fully erased when shipped from protected even during accelerated programming. the factory. The Secured Silicon Sector provides a 128-word/256-byte The Advanced Sector Protection features several levels of area for code or data that can be permanently protected. Once sector protection, which can disable both the program and this sector is protected, no further changes within the sector can erase operations in certain sectors. Persistent Sector occur. Protection is a method that replaces the previous 12-volt Cypress MirrorBit flash technology combines years of Flash controlled protection method. Password Sector Protection is a memory manufacturing experience to produce the highest highly sophisticated protection method that requires a levels of quality, reliability and cost effectiveness. The device password before changes to certain sectors are permitted. electrically erases all bits within a sector simultaneously via hot-hole assisted erase. The data is programmed using hot electron injection. Document Number: 001-98525 Rev. *B Page 2 of 78