S29JL032J 32-Mbit (4M 8-Bit/2M 16-Bit), 3 V, Simultaneous Read/Write Flash Distinctive Characteristics 2 mA active read current at 1 MHz Architectural Advantages 10 mA active read current at 5 MHz Simultaneous Read/Write operations 200 nA in standby or automatic sleep mode Data can be continuously read from one bank while executing Cycling endurance: 100K cycles per sector erase/program functions in another bank. Zero latency between read and write operations Data retention: 20 years typical Multiple bank architecture Software Features Four bank architectures available (refer to Table 2 on page 12). Supports Common Flash Memory Interface (CFI) Boot sectors Top or bottom boot sector configurations available Erase suspend/Erase resume Any combination of sectors can be erased Suspends erase operations to read data from, or program data to, a sector that is not being erased, then resumes the erase Manufactured on 0.11 m Process Technology operation. Secured Silicon Region: Extra 256 byte sector Data polling and toggle bits Factory locked and identifiable: 16 bytes available for secure, Provides a software method of detecting the status of program or random factory Electronic Serial Number verifiable as factory erase operations locked through autoselect function Unlock bypass program command Customer lockable: One-time programmable only. Once locked, data cannot be changed Reduces overall programming time when issuing multiple program command sequences Zero power operation Sophisticated power management circuits reduce power Hardware Features consumed during inactive periods to nearly zero. Ready/Busy output (RY/BY ) Compatible with JEDEC standards Hardware method for detecting program or erase cycle Pinout and software compatible with single-power-supply flash completion standard Hardware reset pin (RESET ) Package Options Hardware method of resetting the internal state machine to the read mode 48-ball Fine-pitch BGA WP /ACC input pin 48-pin TSOP Write protect (WP ) function protects the two outermost boot sectors regardless of sector protect status Performance Characteristics Acceleration (ACC) function accelerates program timing High performance Sector protection Access time as fast as 60 ns Hardware method to prevent any program or erase operation Program time: 6 s/word typical using accelerated programming within a sector function Temporary Sector Unprotect allows changing data in protected Ultra low power consumption (typical values) sectors in-system General Description The S29JL032J is a 32 Mbit, 3.0 volt-only flash memory device, organized as 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. Word mode data appears on DQ15DQ0 byte mode data appears on DQ7DQ0. The device is designed to be programmed in-system with the standard 3.0 volt V supply, and can also be programmed in standard EPROM programmers. CC The device is available with an access time of 60, or 70 ns and is offered in a 48-ball FBGA or a 48-pin TSOP package. Standard control pinschip enable (CE ), write enable (WE ), and output enable (OE )control normal read and write operations, and avoid bus contention issues. The device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. Cypress Semiconductor Corporation 198 Champion CourtSan Jose, CA 95134-1709408-943-2600 Document Number: 002-00857 Rev. *H Revised August 23, 2018S29JL032J Contents Distinctive Characteristics .................................................. 1 11.6 DQ5: Exceeded Timing Limits ...................................... 37 11.7 DQ3: Sector Erase Timer.............................................. 38 General Description ............................................................. 1 12. Absolute Maximum Ratings....................................... 39 1. Simultaneous Read/Write Operations with Zero Latency................................................................. 3 13. Operating Ranges....................................................... 40 1.1 S29JL032J Features...................................................... 3 14. DC Characteristics...................................................... 40 2. Product Selector Guide............................................... 4 14.1 CMOS Compatible........................................................ 40 14.2 Zero-Power Flash ......................................................... 41 3. Block Diagram.............................................................. 4 15. Test Conditions........................................................... 43 3.1 4-Bank Device................................................................ 4 3.2 2-Bank Device................................................................ 5 16. Key To Switching Waveforms.................................... 43 4. Connection Diagrams.................................................. 6 17. AC Characteristics...................................................... 44 4.1 48-pin TSOP Package ................................................... 6 17.1 Read-Only Operations .................................................. 44 4.2 48-ball FBGA Package .................................................. 6 17.2 Hardware Reset (RESET )........................................... 45 17.3 Word/Byte Configuration (BYTE )................................ 46 5. Pin Description............................................................. 7 17.4 Erase and Program Operations .................................... 47 6. Logic Symbol ............................................................... 7 17.5 Temporary Sector Unprotect......................................... 51 7. Ordering Information................................................... 8 17.6 Alternate CE Controlled Erase and Program Operations............................................... 52 8. Device Bus Operations................................................ 9 18. Data Integrity............................................................... 54 8.1 Word/Byte Configuration................................................ 9 8.2 Requirements for Reading Array Data......................... 10 18.1 Erase Endurance .......................................................... 54 8.3 Writing Commands/Command Sequences.................. 10 18.2 Data Retention.............................................................. 54 8.4 Simultaneous Read/Write Operations 19. Erase and Programming Performance ..................... 55 with Zero Latency......................................................... 11 20. Pin Capacitance .......................................................... 55 8.5 Standby Mode.............................................................. 11 8.6 Automatic Sleep Mode................................................. 11 21. Physical Dimensions.................................................. 56 8.7 RESET : Hardware Reset Pin..................................... 11 21.1 TS 04848-Pin TSOP.................................................. 56 8.8 Output Disable Mode ................................................... 12 21.2 VBK04848-Pin FBGA................................................ 57 8.9 Autoselect Mode .......................................................... 17 22. Document History....................................................... 58 8.10 Boot Sector/Sector Block Protection and Unprotection.......................................................... 18 8.11 Write Protect (WP )..................................................... 20 8.12 Temporary Sector Unprotect........................................ 20 8.13 Secured Silicon Region................................................ 22 8.14 Hardware Data Protection............................................ 23 9. Common Flash Memory Interface (CFI) ................... 24 10. Command Definitions................................................ 27 10.1 Reading Array Data ..................................................... 27 10.2 Reset Command.......................................................... 27 10.3 Autoselect Command Sequence ................................. 28 10.4 Enter Secured Silicon Region/ Exit Secured Silicon Region Command Sequence...... 28 10.5 Byte/Word Program Command Sequence................... 28 10.6 Chip Erase Command Sequence ................................ 30 10.7 Sector Erase Command Sequence ............................. 30 10.8 Erase Suspend/Erase Resume Commands ................ 32 11. Write Operation Status .............................................. 34 11.1 DQ7: Data Polling ...................................................... 34 11.2 RY/BY : Ready/Busy ................................................. 35 11.3 DQ6: Toggle Bit I ......................................................... 35 11.4 DQ2: Toggle Bit II ........................................................ 37 11.5 Reading Toggle Bits DQ6/DQ2.................................... 37 Document Number: 002-00857 Rev. *H Page 2 of 61