S29JL064J 64-Mbit (8M 8-Bit/4M 16-Bit), 3 V, Simultaneous Read/Write Flash Distinctive Characteristics Ultra low power consumption (typical values) Architectural Advantages 2 mA active read current at 1 MHz Simultaneous Read/Write operations 10 mA active read current at 5 MHz Data can be continuously read from one bank while executing 200 nA in standby or automatic sleep mode erase/program functions in another bank Cycling endurance: 1 million cycles per sector typical Zero latency between read and write operations Data retention: 20 years typical Flexible bank architecture Read may occur in any of the three banks not being programmed Software Features or erased Four banks may be grouped by customer to achieve desired bank Supports Common Flash Memory Interface (CFI) divisions Erase suspend/erase resume Boot sectors Suspends erase operations to read data from, or program data to, Top and bottom boot sectors in the same device a sector that is not being erased, then resumes the erase Any combination of sectors can be erased operation Manufactured on 0.11 m Process Technology Data polling and toggle bits Provides a software method of detecting the status of program or Secured Silicon Region: Extra 256-byte sector erase operations Factory locked and identifiable: 16 bytes available for secure, random factory Electronic Serial Number verifiable as factory Unlock bypass program command locked through autoselect function Reduces overall programming time when issuing multiple program Customer lockable: One-time programmable only. Once locked, command sequences data cannot be changed Hardware Features Zero power operation Sophisticated power management circuits reduce power Ready/Busy output (RY/BY ) consumed during inactive periods to nearly zero Hardware method for detecting program or erase cycle Compatible with JEDEC standards completion Pinout and software compatible with single-power-supply flash Hardware reset pin (RESET ) standard Hardware method of resetting the internal state machine to the read mode Package Options WP /ACC input pin 48-ball Fine-pitch BGA Write protect (WP ) function protects sectors 0, 1, 140, and 141, regardless of sector protect status 48-pin TSOP Acceleration (ACC) function accelerates program timing Performance Characteristics Sector Protection Hardware method to prevent any program or erase operation High performance within a sector Access time as fast as 55 ns Temporary Sector Unprotect allows changing data in protected Program time: 7 s/word typical using accelerated programming sectors in-system function General Description The S29JL064J is a 64 Mbit, 3.0 volt-only flash memory device, organized as 4,194,304 words of 16 bits each or 8,388,608 bytes of 8 bits each. Word mode data appears on DQ15DQ0 byte mode data appears on DQ7DQ0. The device is designed to be programmed in-system with the standard 3.0 volt V supply, and can also be programmed in standard EPROM programmers. The CC device is available with an access time of 55, 60, 70 ns and is offered in a 48-ball FBGA or 48-pin TSOP package. Standard control pinschip enable (CE ), write enable (WE ), and output enable (OE )control normal read and write operations, and avoid bus contention issues. The device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-00856 Rev. *H Revised August 23, 2018S29JL064J Contents Distinctive Characteristics .................................................. 1 12. Absolute Maximum Ratings....................................... 38 General Description ............................................................. 1 13. Operating Ranges....................................................... 39 1. Simultaneous Read/Write Operations 14. DC Characteristics...................................................... 39 with Zero Latency................................................................. 3 14.1 CMOS Compatible........................................................ 39 1.1 S29JL064J Features...................................................... 3 14.2 Zero-Power Flash ......................................................... 40 2. Product Selector Guide............................................... 4 15. Test Conditions........................................................... 41 3. Block Diagram.............................................................. 4 16. Key To Switching Waveforms.................................... 42 4. Connection Diagrams.................................................. 5 17. AC Characteristics...................................................... 43 4.1 48-pin TSOP Package ................................................... 5 17.1 Read-Only Operations .................................................. 43 4.2 48-ball FBGA Package .................................................. 6 17.2 Hardware Reset (RESET )........................................... 44 17.3 Word/Byte Configuration (BYTE )................................ 45 5. Pin Description............................................................. 6 17.4 Erase and Program Operations .................................... 46 6. Logic Symbol ............................................................... 7 17.5 Temporary Sector Unprotect......................................... 50 17.6 Alternate CE Controlled Erase 7. Ordering Information................................................... 8 and Program Operations............................................... 51 8. Device Bus Operations.............................................. 10 18. Erase and Programming Performance ..................... 53 8.1 Word/Byte Configuration.............................................. 10 8.2 Requirements for Reading Array Data......................... 11 19. Pin Capacitance .......................................................... 53 8.3 Writing Commands/Command Sequences.................. 11 20. Physical Dimensions.................................................. 54 8.4 Simultaneous Read/Write Operations 20.1 TS 04848-Pin Standard TSOP.................................. 54 with Zero Latency......................................................... 11 20.2 VBK04848-Pin FBGA................................................ 55 8.5 Standby Mode.............................................................. 12 8.6 Automatic Sleep Mode................................................. 12 21. Revision History.......................................................... 56 8.7 RESET : Hardware Reset Pin..................................... 12 8.8 Output Disable Mode ................................................... 13 8.9 Autoselect Mode .......................................................... 17 8.10 Boot Sector/Sector Block Protection and Unprotection ........................................ 18 8.11 Write Protect (WP )..................................................... 19 8.12 Temporary Sector Unprotect........................................ 20 8.13 Secured Silicon Region................................................ 22 8.14 Hardware Data Protection............................................ 23 9. Common Flash Memory Interface (CFI) ................... 24 10. Command Definitions................................................ 27 10.1 Reading Array Data ..................................................... 27 10.2 Reset Command.......................................................... 27 10.3 Autoselect Command Sequence ................................. 28 10.4 Enter Secured Silicon Region/ Exit Secured Silicon Region Command Sequence...... 28 10.5 Byte/Word Program Command Sequence................... 28 10.6 Chip Erase Command Sequence ................................ 30 10.7 Sector Erase Command Sequence ............................. 30 10.8 Erase Suspend/Erase Resume Commands ................ 31 11. Write Operation Status .............................................. 33 11.1 DQ7: Data Polling ...................................................... 33 11.2 RY/BY : Ready/Busy ................................................. 34 11.3 DQ6: Toggle Bit I ......................................................... 35 11.4 DQ2: Toggle Bit II ........................................................ 36 11.5 Reading Toggle Bits DQ6/DQ2.................................... 37 11.6 DQ5: Exceeded Timing Limits ..................................... 37 11.7 DQ3: Sector Erase Timer............................................. 37 Document Number: 002-00856 Rev. *H Page 2 of 59