S29WS512PABBFW000 Infineon

S29WS512P S29WS256P S29WS128P SUPPLEMENT 512/256/128 Mb (32/16/8 M x 16 bit), 1.8 V, Simultaneous Read/Write Flash Features Single 1.8 V read/program/erase (1.701.95 V) Hardware (WP ) protection of top and bottom sectors 90 nm MirrorBit Technology Dual boot sector configuration (top and bottom) Simultaneous Read/Write operation with zero latency Handshaking by monitoring RDY Random page read access mode of 8 words with 20 ns intra Offered Packages page access time WS512P/WS256P/WS128P: 84-ball FBGA (11.6 mm x 8 mm) 32 Word / 64 Byte Write Buffer Low V write inhibit Sixteen-bank architecture consisting of CC 32/16/8 Mwords for 512/256/128P, respectively Persistent and Password methods of Advanced Sector Protection Four 16 Kword sectors at both top and bottom of memory array Write operation status bits indicate program and erase operation completion 510/254/126 64Kword sectors (WS512/256/128P) Suspend and Resume commands for Program and Erase Programmable linear (8/16/32) with or without wrap around operations and continuous burst read modes Unlock Bypass program command to reduce programming Secured Silicon Sector region consisting of 128 words each time for factory and 128 words for customer Synchronous or Asynchronous program operation, 20-year data retention (typical) independent of burst control register settings Cycling Endurance: 100,000 cycles per sector (typical) ACC input pin to reduce factory programming time Command set compatible with JEDEC (42.4) standard Support for Common Flash Interface (CFI) General Description The Cypress S29WS512/256/128P are Mirrorbit Flash products fabricated on 90 nm process technology. These burst mode Flash devices are capable of performing simultaneous read and write operations with zero latency on two separate banks using separate data and address pins. These products can operate up to 104 MHz and use a single V of 1.7 V to 1.95 V that makes them ideal CC for todays demanding wireless applications requiring higher density, better performance and lowered power consumption. Performance Characteristics Read Access Times Current Consumption (typical values) Speed Option (MHz) 104 Continuous Burst Read 104 MHz 36 mA Max. Synch Access Time (t ) 103.8 Simultaneous Operation 104 MHz 40 mA IACC Max. Synch. Burst Access, ns (t)7.6 Program 20 mA BACC Max OE Access Time, ns (t)7.6 Standby Mode 20 A OE Max. Asynch. Access Time, ns (t)80 ACC Typical Program & Erase Times Single Word Programming 40 s Effective Write Buffer Programming (V ) Per CC 9.4 s Word Effective Write Buffer Programming (V ) Per ACC 6 s Word Sector Erase (16 Kword Sector) 350 ms Sector Erase (64 Kword Sector) 600 ms Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-01747 Rev. *B Revised June 29, 2017S29WS512P S29WS256P SUPPLEMENT S29WS128P Contents 1. Ordering Information................................................... 3 11.7 Power-up/Initialization................................................... 65 11.8 CLK Characterization.................................................... 66 1.1 Valid Combinations........................................................ 3 11.9 AC Characteristics ........................................................ 67 2. Input/Output Descriptions & Logic Symbol .............. 4 11.10Erase and Programming Performance......................... 80 3. Block Diagrams............................................................ 5 12. Appendix ..................................................................... 81 4. Physical Dimensions/Connection Diagrams............. 6 12.1 Common Flash Memory Interface................................. 85 4.1 Related Documents ....................................................... 6 13. Revision History.......................................................... 90 4.2 Special Handling Instructions for FBGA Package.......... 6 4.3 MCP Look-ahead Connection Diagram ......................... 7 5. Additional Resources.................................................. 8 6. Product Overview ........................................................ 9 6.1 Memory Map.................................................................. 9 7. Device Operations ..................................................... 13 7.1 Device Operation Table ............................................... 13 7.2 Asynchronous Read..................................................... 14 7.3 Page Mode Read......................................................... 14 7.4 Synchronous (Burst) Read Operation.......................... 15 7.5 Synchronous (Burst) Read Mode & Configuration Register........................................................................ 26 7.6 Autoselect .................................................................... 30 7.7 Program/Erase Operations .......................................... 32 7.8 Simultaneous Read/Program or Erase ........................ 48 7.9 Writing Commands/Command Sequences.................. 48 7.10 Handshaking................................................................ 49 7.11 Hardware Reset........................................................... 49 7.12 Software Reset ............................................................ 49 8. Advanced Sector Protection/Unprotection ............. 51 8.1 Advanced Sector Protection Software Examples ........ 51 8.2 Lock Register............................................................... 52 8.3 Persistent Protection Bits............................................. 53 8.4 Dynamic Protection Bits............................................... 54 8.5 Persistent Protection Bit Lock Bit................................. 54 8.6 Password Protection Method....................................... 54 8.7 Hardware Data Protection Methods............................. 56 9. Power Conservation Modes...................................... 58 9.1 Standby Mode.............................................................. 58 9.2 Automatic Sleep Mode................................................. 58 9.3 Hardware RESET Input Operation............................. 58 9.4 Output Disable (OE )................................................... 58 10. Secured Silicon Sector Flash Memory Region ....... 59 10.1 Factory Secured Silicon Sector.................................... 59 10.2 Customer Secured Silicon Sector................................ 60 10.3 Secured Silicon Sector Entry/Exit Command Sequences................................................................... 60 11. Electrical Specifications............................................ 62 11.1 Absolute Maximum Ratings ......................................... 62 11.2 Operating Ranges........................................................ 62 11.3 DC Characteristics....................................................... 63 11.4 Test Conditions............................................................ 64 11.5 Key to Switching Waveforms ....................................... 65 11.6 Switching Waveforms .................................................. 65 Document Number: 002-01747 Rev. *B Page 2 of 91