Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comS70FL01GS 1 Gbit (128 Mbyte) 3.0V SPI Flash Features CMOS 3.0V Core Security Features Serial Peripheral Interface (SPI) with Multi-I/O One Time Program (OTP) array of 2048 bytes SPI Clock polarity and phase modes 0 and 3 Block Protection Double Data Rate (DDR) option Status Register bits to control protection against program Extended Addressing: 32-bit address or erase of a contiguous range of sectors. Serial Command set and footprint compatible with Hardware and software control options S25FL-A, S25FL-K, and S25FL-P SPI families Advanced Sector Protection (ASP) Multi I/O Command set and footprint compatible with Individual sector protection controlled by boot code or S25FL-P SPI family password READ Commands Cypress 65 nm MirrorBit Technology with Eclipse Normal, Fast, Dual, Quad, Fast DDR, Dual DDR, Quad Architecture DDR Core Supply Voltage: 2.7V to 3.6V AutoBoot power up or reset and execute a Normal or I/O Supply Voltage: 1.65V to 3.6V Quad read command automatically at a preselected Temperature Range / Grade: address Industrial ( 40 C to +85 C) Common Flash Interface (CFI) data for configuration Industrial Plus ( 40 C to +105 C) information Automotive, AEC-Q100 Grade 3 ( 40 C to +85 C) Programming (1.5 Mbytes/s) Automotive, AEC-Q100 Grade 2 ( 40 C to +105 C) 512-byte Page Programming buffer Automotive, AEC-Q100 Grade 1 ( 40 C to +125 C) Quad-Input Page Programming (QPP) for slow clock Packages (all Pb-free) systems 16-lead SOIC (300 mils) Erase (0.5 Mbytes/s) BGA-24, 8 6 mm Uniform 256-kbyte sectors 5 5 ball (ZSA024) footprint Cycling Endurance 100,000 Program-Erase Cycles, minimum Data Retention 20 Year Data Retention, minimum General Description This document contains information for the S70FL01GS device, which is a dual die stack of two S25FL512S die. For detailed specifications, refer to the discrete die datasheet provided in the Affected Documents/Related Documents table. Affected Documents/Related Documents Document Title Publication Number S25FL512S 512 Mbit (64 Mbyte) 3.0V SPI Flash Memory Datasheet 001-98284 Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-98295 Rev. *N Revised April 03, 2018