S70FL01GS 1 Gbit (128 Mbyte) 3.0V SPI Flash Features CMOS 3.0V Core Security Features Serial Peripheral Interface (SPI) with Multi-I/O One Time Program (OTP) array of 2048 bytes SPI Clock polarity and phase modes 0 and 3 Block Protection Double Data Rate (DDR) option Status Register bits to control protection against program Extended Addressing: 32-bit address or erase of a contiguous range of sectors. Serial Command set and footprint compatible with Hardware and software control options S25FL-A, S25FL-K, and S25FL-P SPI families Advanced Sector Protection (ASP) Multi I/O Command set and footprint compatible with Individual sector protection controlled by boot code or S25FL-P SPI family password READ Commands Cypress 65 nm MirrorBit Technology with Eclipse Normal, Fast, Dual, Quad, Fast DDR, Dual DDR, Quad Architecture DDR Core Supply Voltage: 2.7V to 3.6V AutoBoot power up or reset and execute a Normal or I/O Supply Voltage: 1.65V to 3.6V Quad read command automatically at a preselected Temperature Range / Grade: address Industrial ( 40 C to +85 C) Common Flash Interface (CFI) data for configuration Industrial Plus ( 40 C to +105 C) information Automotive, AEC-Q100 Grade 3 ( 40 C to +85 C) Programming (1.5 Mbytes/s) Automotive, AEC-Q100 Grade 2 ( 40 C to +105 C) 512-byte Page Programming buffer Automotive, AEC-Q100 Grade 1 ( 40 C to +125 C) Quad-Input Page Programming (QPP) for slow clock Packages (all Pb-free) systems 16-lead SOIC (300 mils) Erase (0.5 Mbytes/s) BGA-24, 8 6 mm Uniform 256-kbyte sectors 5 5 ball (ZSA024) footprint Cycling Endurance 100,000 Program-Erase Cycles, minimum Data Retention 20 Year Data Retention, minimum General Description This document contains information for the S70FL01GS device, which is a dual die stack of two S25FL512S die. For detailed specifications, refer to the discrete die datasheet provided in the Affected Documents/Related Documents table. Affected Documents/Related Documents Document Title Publication Number S25FL512S 512 Mbit (64 Mbyte) 3.0V SPI Flash Memory Datasheet 001-98284 Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-98295 Rev. *N Revised April 03, 2018S70FL01GS Contents 1. Block Diagram.............................................................. 3 10. SDR AC Characteristics ............................................. 10 10.1 DDR AC Characteristics ............................................... 11 2. Connection Diagrams.................................................. 4 10.2 Capacitance Characteristics ......................................... 11 3. Input/Output Summary................................................ 5 11. Ordering Information.................................................. 12 4. Device Operations ....................................................... 6 11.1 Valid Combinations Standard................................... 13 4.1 Programming ................................................................. 6 11.2 Valid Combinations Automotive Grade / 4.2 Simultaneous Die Operation.......................................... 6 AEC-Q100 .................................................................... 13 4.3 Sequential Reads........................................................... 6 12. Other Resources......................................................... 14 4.4 Sector/Bulk Erase .......................................................... 6 12.1 Cypress Flash Memory Roadmap ................................ 14 4.5 Status Registers............................................................. 6 12.2 Links to Software .......................................................... 14 4.6 Configuration Register ................................................... 6 12.3 Links to Application Notes............................................. 14 4.7 Bank Address Register .................................................. 6 4.8 Security and DDR Registers.......................................... 6 13. Physical Diagram........................................................ 15 4.9 Block Protection............................................................. 6 13.1 SOIC 16 Lead, 300-mil Body Width.............................. 15 13.2 24-Ball BGA 8 x 6 mm (ZSA024).................................. 16 5. Read Identification (RDID)........................................... 7 14. Revision History.......................................................... 17 6. RESET ......................................................................... 7 Sales, Solutions, and Legal Information .......................... 19 7. Versatile I/O Power Supply (V )................................. 7 IO Worldwide Sales and Design Support ........................... 19 8. DC Characteristics....................................................... 8 Products ........................................................................ 19 PSoC Solutions .......................................................... 19 9. AC Test Conditions...................................................... 9 Cypress Developer Community ..................................... 19 Technical Support ......................................................... 19 Document Number: 001-98295 Rev. *N Page 2 of 19