Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comS70GL02GS 2 Gbit (256 MBytes), 3.0 V Flash Memory General Description The Cypress S70GL02GS 2-Gigabit MirrorBit Flash memory device is fabricated on 65 nm MirrorBit Eclipse process technology. This device offers a fast page access time of 25 ns with a corresponding random access time of 110 ns. It features a Write Buffer that allows a maximum of 256 words/512 bytes to be programmed in one operation, resulting in faster effective programming time than standard single byte/word programming algorithms. This makes the device an ideal product for todays embedded applications that require higher density, better performance and lower power consumption. This document contains information for the S70GL02GS device, which is a dual die stack of two S29GL01GS die. For detailed specifications, please refer to the discrete die datasheet. Document Cypress Document Number S29GL01GS Datasheet 001-98285 Distinctive Characteristics CMOS 3.0 Volt Core with Versatile I/O Status Register, Data Polling, and Ready/Busy pin methods to determine device status Two 1024 Megabit (S29GL01GS) in a single 64-ball Fortified-BGA package (see S29GL01GS datasheet for full Advanced Sector Protection (ASP) specifications) Volatile and non-volatile protection methods for each sector 65 nm MirrorBit Eclipse process technology Separate 1024-bye One Time Program (OTP) array with two Single supply (V ) for read / program / erase (2.7V to 3.6V) CC lockable regions Versatile I/O Feature Available in each device Support for CFI (Common Flash Wide I/O voltage (VIO): 1.65V to V CC Interface) x16 data bus WP input 16-word/32-byte page read buffer Protects first or last sector, or first and last sectors of each 512-byte Programming Buffer device, regardless of sector protection settings Programming in Page multiples, up to a maximum of 512 Industrial temperature range (40C to +85C) bytes Automotive AEC-Q100 Grade 3 (40C to +85C) Sector Erase Automotive AEC-Q100 Grade 2 (40C to +105C) Uniform 128-Kbytes sectors 100,000 erase cycles per sector typical S70GL02GS: two thousand forty-eight sectors 20-year data retention typical Suspend and Resume commands for Program and Erase Packaging Options operations 64-ball LSH Fortified BGA, 13 mm 11 mm Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-98296 Rev. *J Revised August 09, 2017