Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comS70GL02GT 2-Gbit (256-MB) 3.0 V Flash Memory General Description The Cypress S70GL02GT 2-Gigabit MirrorBit Flash memory device is fabricated on 45-nm MirrorBit Eclipse process technology. This device offers a fast page access time of 25 ns with a corresponding random access time of 110 ns. It features a Write Buffer that allows a maximum of 256 words/512 bytes to be programmed in one operation, resulting in faster effective programming time than standard single byte/word programming algorithms. This makes the device an ideal product for todays embedded applications that require higher density, better performance and lower power consumption. This document contains information for the S70GL02GT device, which is a dual-die stack of two S29GL01GT dies. For detailed specifications, refer to the discrete die datasheet provided in the below table. Document Cypress Document Number S29GL01GT, S29GL512T Datasheet 002-00247 Distinctive Characteristics CMOS 3.0-V Core with Versatile I/O Status Register, Data Polling, and Ready/Busy pin methods to determine device status Two 1024 Megabit (S29GL01GT) in a single 64-ball fortified- BGA package (see the S29GL01GT datasheet for full Advanced Sector Protection (ASP) specifications) Volatile and nonvolatile protection methods for each sector 45 nm MirrorBit Eclipse process technology Separate 1024-bye One Time Program (OTP) array with two lockable regions Single supply (V ) for read/program/erase (2.7 V to 3.6 V) CC Each device supports Common Flash Interface (CFI) Versatile I/O feature WP input Wide I/O voltage (V ): 1.65 V to V IO CC Protects the last sector of the device, regardless of sector 8 and 16 data bus protection settings 16-word/32-byte page read buffer Temperature range/grade 512-byte programming buffer Industrial (40 C to +85 C) Programming in page multiples, up to a maximum of Industrial Plus (40 C to +105 C) 512 bytes Automotive, AEC-Q100 Grade 3 (40 C to +85 C) Sector erase Automotive, AEC-Q100 Grade 2 (40 C to +105 C) Uniform 128-KB sectors 100,000 Program-Erase cycles S70GL02GT: 2048 sectors 20-year data retention Suspend and Resume commands for Program and Erase Packaging options operations 64-ball LSH fortified BGA, 13 mm 11 mm Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-13915 Rev. *E Revised February 13, 2018