Intel Ethernet Controller X550 Datasheet Ethernet Products Group (EPG) PRODUCT FEATURES General Host Interface Serial Flash interface PCIe 3.0 Base Specification Firmware authentication on update Bus width x1, x4, x8 Configurable LED operation for software or customizing OEM 64-bit address support for systems using more than 4 GB of LED displays physical memory Device disable capability Package sizes MAC Functions 25 mm x 25 mm (X550-BT2) Descriptor ring management hardware for transmit and 17 mm x 17 mm (X550-AT2) receive ACPI register set and power down functionality supporting Networking D0 and D3 states 10 GbE/1 GbE/100 Mb/s copper PHYs integrated on-chip A mechanism for delaying/reducing transmit interrupts Support for jumbo frames of up to 15.5 KB Software-controlled global reset bit (resets everything Flow control support: send/receive pause frames and receive except the configuration registers) FIFO thresholds Four Software-Definable Pins (SDP) per port Statistics for management and RMON Wake up 802.1q VLAN support IPv6 wake-up filters TCP segmentation offload: up to 256 KB Configurable flexible filter (through NVM) IPv6 support for IP/TCP and IP/UDP receive checksum LAN function disable capability offload Programmable memory transmit buffers (160 KB/port) Fragmented UDP checksum offload for packet reassembly Default configuration by NVM for all LEDs for pre-driver Message Signaled Interrupts (MSI) functionality Message Signaled Interrupts (MSI-X) Interrupt throttling control to limit maximum interrupt rate Manageability and improve CPU usage SR-IOV support Flow Director (16 x 8 and 32 x 4) Eight VLAN L2 filters 128 transmit queues 16 Flex L3 port filters Receive packet split header Four Flexible TCO filters Receive header replication Four L3 address filters (IPv4) Dynamic interrupt moderation Advanced pass through-compatible management packet TCP timer interrupts transmit/receive support Relaxed ordering SMBus interface to an external Manageability Controller (MC) Support for 64 virtual machines per port (64 VMs x 2 NC-SI interface to an external MC queues) Four L3 address filters (IPv6) Support for Data Center Bridging (DCB) (802.1Qaz, Four L2 address filters 802.1Qbb, 802.1p) Revision 2.6 January 2021 333369-008 Intel Ethernet Controller X550 Datasheet Revision History Revision History Revision Date Notes 2.6 January 20, 2021 Updates include the following: Updated title page to include Firmware authentication on update under General Product Features. Updated Section 1.3.3, Serial Flash Interface with discussion on signed firmware authentication. 2.5 August 6, 2020 Updates include the following: Updated table in Section 2.2.5, NC-SI. Updated table in Section 2.2.8, RSVD and No-Connect Pins. Updated Table 2-1, External Pull-Up Resistors. Updated Section 3.7.3.2, Auto-Negotiation and Link Setup. Updated Table 4-1, Notes for Power-Up Timing Diagram. Updated table containing list of support flash devices in Section 12.8.1, Flash. 2.4 April 9, 2020 Updates include the following: Updated title of Section 6.2.2.79, Reserved (0x004E). Updated Section 6.2.17.6, NC-SI Configuration 2 (0x0005) Added Bit 14, NC-SI Package ID from SDP Workaround. Updated Figure 11-12, MCTP Bus Transition State Machine. Updated Table 12-2, X550-AT Power Consumption Revised device total power numbers. Added Section 12.8, Devices Supported and Section 12.8.1, Flash. 2.3 November 19, 2018 Updates include the following: Added changes related to NVM Recovery Mode: Section 8.2.2.20.2, Firmware Semaphore Register - FWSM (0x00010148) Added Bit 5, OPERATION MODE. Added Section 15.3, NVM Recovery Mode. Updated Section 6, Non-Volatile Memory Map. Updated Table 11-43, Get MCTP Version Support Returned Value. Updated table in Section 12.3.10.1, Aux Power on Peak Current Consumption. Updated Table 14-2, The X550 Absolute Thermal Maximum Rating (C) 2.2 July 21, 2017 Updates include the following: Added Section 2.2.8.1, Pin Differences in the X550-AT Single Port Device. Section 11.7.6.1.3 Added reference to list of support message types. Section 11.7.6.1.3.1 Modified verbiage in Value column for Bytes 3:5 in Table 11-44. Section 12.3.9 Added new table for X550-AT power consumption. Section 12.3.10.1 Updated values in associate table. 2.1 May 10, 2016 Updates include the following: Removed EEC.FLUPD bit. No longer used for triggering Shadow RAM dump. Removed FLUPDATE register (0x00015F54). Table 3-26 Updated description for SDP1. Section 9.2.3.6.7, Link Capabilities Register (0xAC RO) Changed default value for ASPM support (bits 11:10) to 10b. Section 11.8.3.1, Driver Info Host Command Updated Table 11-49. Table 12-3 and Table 12-4 Changed Device Total Power units from mW to W. Table 12-20 Updated thermal diode typical ESR value to 2.77 . Table 15-2 Updated ID Code values. Other miscellaneous updates. 2 333369-008