IS61C5128AL/AS IS64C5128AL/AS 512K x 8 HIGH-SPEED CMOS STATIC RAM DECEMBER 2016 FEATURES DESCRIPTION The ISSI IS61C5128AL/AS and IS64C5128AL/AS are high- HIGH SPEED: (IS61/64C5128AL) speed, 4,194,304-bit static RAMs organized as 524,288 High-speed access time: 10ns, 12 ns words by 8 bits. They are fabr icated using ISSI s high- Low Active Power : 150 mW (typical) perfor mance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields Low Standby Power : 10 mW (typical) access times as fast as 12 ns with low power consumption. CMOS standby LOW POWER: (IS61/64C5128AS) When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced High-speed access time: 25ns down with CMOS input levels. Low Active Power : 75 mW (typical) Low Standby Power : 1 mW (typical) Easy memory expansion is provided by using Chip Enable CMOS standby and Output Enable inputs, CE and OE. The active LOW Wr ite Enable (WE) controls both writing and reading of the TTL compatible interface levels memory. A data byte allows Upper Byte (UB) and Lower Single 5V 10% power supply Byte (LB) access. Fully static operation: no clock or refresh required The IS61C5128AL/AS and IS64C5128AL/AS are packaged in the JEDEC standard 36-pin SOJ (400-mil), 32-pin sTSOP-I, Available in 36-pin SOJ (400-mil), 32-pin 32-pin SOP, 44-pin TSOP-II and 32-pin TSOP-II packages sTSOP-I, 32-pin SOP, 44-pin TSOP-II and 32-pin TSOP-II packages Commercial, Industr ial and Automotive tempera- ture ranges available Lead-free available FUNCTIONAL BLOCK DIAGRAM 512K X 8 A0-A18 DECODER MEMORY ARRAY VDD GND I/O COLUMN I/O I/O0-I/O7 DATA CIRCUIT CE CONTROL OE CIRCUIT WE Copyright 2016 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. C1 12/18/2016IS61C5128AL/AS IS64C5128AL/AS HIGH SPEED (IS61/64C5128AL) PIN CONFIGURATION 36-Pin SOJ (400-mil) 44-Pin TSOP (Type II) A0 1 36 NC NC 1 44 NC A1 2 35 A18 NC 2 43 NC A2 3 34 A17 A0 3 42 NC A3 4 33 A16 A1 4 41 A18 A2 5 40 A17 A4 5 32 A15 A3 6 39 A16 31 CE 6 OE A4 7 38 A15 CE 8 37 OE I/O0 7 30 I/O7 I/O0 9 36 I/O7 I/O1 8 29 I/O6 I/O1 10 35 I/O6 VDD 9 28 GND VDD 11 34 GND GND 12 33 VDD GND 10 27 VDD I/O2 13 32 I/O5 I/O2 11 26 I/O5 I/O3 14 31 I/O4 I/O3 12 25 I/O4 WE 15 30 A14 A5 16 29 A13 WE 13 24 A14 A6 17 28 A12 A5 14 23 A13 A7 18 27 A11 A8 19 26 A10 A6 15 22 A12 A9 20 25 NC A7 16 21 A11 24 NC 21 NC A8 17 20 A10 23 NC 22 NC A9 18 19 NC PIN DESCRIPTIONS A0-A18 Address Inputs CE Chip Enable Input OE Output Enable Input WE Wr ite Enable Input I/O0-I/O7 Bidirectional Por ts Vdd Power GND Ground NC No Connection 2 Integrated Silicon Solution, Inc. www.issi.com Rev. C1 12/18/2016