X-On Electronics has gained recognition as a prominent supplier of IS61LF102436B-7.5TQLI SRAM across the USA, India, Europe, Australia, and various other global locations. IS61LF102436B-7.5TQLI SRAM are a product manufactured by ISSI. We provide cost-effective solutions for SRAM, ensuring timely deliveries around the world.

IS61LF102436B-7.5TQLI ISSI

IS61LF102436B-7.5TQLI electronic component of ISSI
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Part No.IS61LF102436B-7.5TQLI
Manufacturer: ISSI
Category: SRAM
Description: SRAM 36Mb,Flow-Through,Sync,1Mb x 36,7.5ns,3.3V I/O,100 Pin TQFP, RoHS
Datasheet: IS61LF102436B-7.5TQLI Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
1: USD 94.798 ea
Line Total: USD 94.8 
Availability - 64
Ship by Fri. 29 Nov to Tue. 03 Dec
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
64
Ship by Fri. 29 Nov to Tue. 03 Dec
MOQ : 1
Multiples : 1
1 : USD 94.798
10 : USD 85.349
25 : USD 83.479
50 : USD 79.519
72 : USD 74.767
288 : USD 73.491
504 : USD 73.48

   
Manufacturer
Product Category
RoHS - XON
Icon ROHS
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Access Time
Maximum Clock Frequency
Interface Type
Supply Voltage - Max
Supply Voltage - Min
Maximum Operating Temperature
Minimum Operating Temperature
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Package / Case
Supply Current - Max
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Mxhts
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Notes:- Show Stocked Products With Similar Attributes.

We are delighted to provide the IS61LF102436B-7.5TQLI from our SRAM category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the IS61LF102436B-7.5TQLI and other electronic components in the SRAM category and beyond.

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IS61(64)LF102436B, IS61(64)VF/VVF102436B IS61(64)LF204818B, IS61(64)VF/VVF204818B 1M x 36, 2M x 18 0 < 2015 36 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM DESCRIPTION FEATURES The 36Mb product family features high-speed, low-power Internal self-timed write cycle synchronous static RAMs designed to provide burstable, Individual Byte Write Control and Global Write high-performance memory for communication and network- ing applications. The IS61LF/VF102436B is organized as Clock controlled, registered address, data and 1,048,476 words by 36 bits. The IS61LF/VF204818B is control organized as 2,096,952 words by 18 bits. Fabricated with ISSI s advanced CMOS technology, the device integrates Burst sequence control using MODE input a 2-bit burst counter, high-speed SRAM core, and high- Three chip enable option for simple depth expan- drive capability outputs into a single monolithic circuit. All sion and address pipelining synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input. Common data inputs and data outputs Write cycles are internally self-timed and are initiated by the Auto Power-down during deselect rising edge of the clock input. Write cycles can be one to Single cycle deselect four bytes wide as controlled by the write control inputs. Separate byte enables allow individual bytes to be writ- Snooze MODE for reduced-power standby ten. Byte write operation is performed by using byte write JTAG Boundary Scan for PBGA package enable (BWE) input combined with one or more individual byte write signals (BWx). In addition, Global Write (GW) Power Supply is available for writing all bytes at one time, regardless of LF: Vdd 3.3V (+ 5%), Vddq 3.3V/2.5V (+ 5%) the byte write controls. VF: Vdd 2.5V (+ 5%), Vddq 2.5V (+ 5%) Bursts can be initiated with either ADSP (Address Status Processor) or ADSC (Address Status Cache Controller) VVF: Vdd 1.8V (+ 5%), Vddq 1.8V (+ 5%) input pins. Subsequent burst addresses can be gener- ated internally and controlled by the ADV (burst address JEDEC 100-Pin TQFP, 119-pin PBGA, and 165- advance) input pin. pin PBGA packages The mode pin is used to select the burst sequence order, Lead-free available Linear burst is achieved when this pin is tied LOW. Inter- leave burst is achieved when this pin is tied HIGH or left floating. FAST ACCESS TIME Symbol Parameter -6.5 -7.5 Units tkq Clock Access Time 6.5 7.5 ns tkc Cycle Time 7.5 8.5 ns Frequency 133 117 MHz Copyright 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 1 Rev. A 05/4/2015IS61(64)LF102436B, IS61(64)VF/VVF102436B IS61(64)LF204818B, IS61(64)VF/VVF204818B BLOCK DIAGRAM MODE A0 A0 CLK Q0 BINARY /CKE COUNTER A1 A1 Q1 /ADV /CE /ADSC /CLR /ADSP 20/21 1Mx36 2Mx18 D Q A0-x Memory Array x18: x=21 ADDRESS 18/19 x36: x=20 REGISTER /CE CLK /GW D Q /BWE DQ(a-d) BYTE WRITE /BW(a-x) REGISTERS x18:x=b, INPUT x32,x36:x=d REGISTER CLK /CE D Q CE2 CLK ENABLE /CE2 OUTPUT REGISTERS DQ(a-x) REGISTER x18:x=b, Power x32,x36:x=d CLK ZZ Down CLK /OE 2 Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 Rev. A 05/4/2015

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
Integrated Silicon Solution ()
Integrated Silicon Solution (ISSI)
INTEGRATED SILICON SOLUTIONS INC
ISSI
ISSI(Integrated Silicon Solution)
ISSI, Integrated Silicon Solution Inc
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