IS61LV256AL 32K x 8 LOW VOLTAGE MARCH 2020 CMOS STATIC RAM DESCRIPTION FEATURES The ISSI IS61LV256AL is a very high-speed, low power, High-speed access times: 32,768-word by 8-bit static RAM. It is fabricated using ISSI s 10 ns high-performance CMOS technology. This highly reliable Automatic power-down when chip is deselected process coupled with innovative circuit design techniques, CMOS low power operation yields access times as fast as 8 ns maximum. 60 W (typical) CMOS standby When CE is HIGH (deselected), the device assumes a 65 mW (typical) operating standby mode at which the power dissipation is reduced to TTL compatible interface levels 150 W (typical) with CMOS input levels. Single 3.3V power supply Easy memory expansion is provided by using an active Fully static operation: no clock or refresh LOW Chip Enable (CE). The active LOW Write Enable (WE) required controls both writing and reading of the memory. Three-state outputs The IS61LV256AL is available in the JEDEC standard Lead-free available 28-pin, 300-mil SOJ and the 450-mil TSOP (Type I) pack- ages. FUNCTIONAL BLOCK DIAGRAM 32K X 8 A0-A14 DECODER MEMORY ARRAY VDD GND I/O COLUMN I/O I/O0-I/O7 DATA CIRCUIT CE CONTROL OE CIRCUIT WE Copyright 2020 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liabil- ity arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. 1-800-379-4774 1 Rev. C1 03/02/2020IS61LV256AL PIN CONFIGURATION PIN CONFIGURATION 28-Pin SOJ 28-Pin TSOP (Type I) A14 1 28 VDD OE 22 21 A10 A12 2 27 WE A11 23 20 CE A7 3 26 A13 A9 24 19 I/O7 A8 25 18 I/O6 A6 4 25 A8 A13 26 17 I/O5 A5 5 24 A9 WE 27 16 I/O4 A4 6 23 A11 VDD 28 15 I/O3 A3 7 22 OE A14 1 14 GND A2 8 21 A10 A12 2 13 I/O2 A1 9 20 CE A7 3 12 I/O1 A0 10 19 I/O7 A6 4 11 I/O0 I/O0 11 18 I/O6 A5 5 10 A0 I/O1 12 17 I/O5 A4 6 9 A1 A3 7 8 A2 I/O2 13 16 I/O4 GND 14 15 I/O3 TRUTH TABLE PIN DESCRIPTIONS Mode WE CE OE I/O Operation VDD Current A0-A14 Address Inputs Not Selected X H X High-Z Isb 1, Isb 2 CE Chip Enable Input (Power-down) OE Output Enable Input Output Disabled H L H High-Z Icc WE Write Enable Input Read H L L d out Icc I/O0-I/O7 Input/Output Write L L X d In Icc Vdd Power GND Ground (1) ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Vdd Power Supply Voltage Relative to GND 0.5 to +4.6 V Vterm Terminal Voltage with Respect to GND 0.5 to +4.6 V t stg Storage Temperature 65 to +150 C Pd Power Dissipation 1 W Iout DC Output Current 20 mA Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2 Integrated Silicon Solution, Inc. 1-800-379-4774 Rev. C1 03/02/2020