IS61LV5128AL ISSI 512K x 8 HIGH-SPEED CMOS STATIC RAM APRIL 2005 DESCRIPTION FEATURES High-speed access times: The ISSI IS61LV5128AL is a very high-speed, low power, 10, 12 ns 524,288-word by 8-bit CMOS static RAM. The IS61LV5128AL is fabricated using ISSI s high-perform- High-performance, low-power CMOS process ance CMOS technology. This highly reliable process Multiple center power and ground pins for coupled with innovative circuit design techniques, yields greater noise immunity higher performance and low power consumption devices. Easy memory expansion with CE and OE When CE is HIGH (deselected), the device assumes a options standby mode at which the power dissipation can be CE power-down reduced down to 250 W (typical) with CMOS input levels. Fully static operation: no clock or refresh The IS61LV5128AL operates from a single 3.3V power required supply and all inputs are TTL-compatible. TTL compatible inputs and outputs The IS61LV5128AL is available in 36-pin 400-mil SOJ, 36- pin mini BGA, and 44-pin TSOP (Type II) packages. Single 3.3V power supply Packages available: 36-pin 400-mil SOJ 36-pin miniBGA 44-pin TSOP (Type II) Lead-free available FUNCTIONAL BLOCK DIAGRAM 512K X 8 A0-A18 DECODER MEMORY ARRAY VDD GND I/O COLUMN I/O I/O0-I/O7 DATA CIRCUIT CE CONTROL OE CIRCUIT WE Copyright 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 1 Rev. C 04/15/05 IS61LV5128AL ISSI PIN CONFIGURATION 44-Pin TSOP (Type II) 36 mini BGA 1 2 3 4 5 6 NC 1 44 NC NC 2 43 NC A0 3 42 NC A1 4 41 A18 A2 5 40 A17 A3 6 39 A16 A A0 A1 NC A3 A6 A8 A4 7 38 A15 B I/O4 A2 WE A4 A7 I/O0 CE 8 37 OE I/O0 9 36 I/O7 C I/O5 NC A5 I/O1 I/O1 10 35 I/O6 D GND VDD VDD 11 34 GND GND 12 33 VDD VDD GND E I/O2 13 32 I/O5 F I/O6 A18 A17 I/O2 I/O3 14 31 I/O4 WE 15 30 A14 I/O7 OE A16 A15 I/O3 G CE A5 16 29 A13 A9 A10 A11 A12 A13 A14 A6 17 28 A12 H A7 18 27 A11 A8 19 26 A10 A9 20 25 NC NC 21 24 NC NC 22 23 NC 36-Pin SOJ PIN DESCRIPTIONS A0-A18 Address Inputs A0 1 36 NC CE Chip Enable Input A1 2 35 A18 A2 3 34 A17 OE Output Enable Input A3 4 33 A16 WE Write Enable Input A4 5 32 A15 I/O0-I/O7 Bidirectional Ports CE 6 31 OE I/O0 7 30 I/O7 VDD Power I/O1 8 29 I/O6 GND Ground VDD 9 28 GND GND 10 27 VDD NC No Connection I/O2 11 26 I/O5 I/O3 12 25 I/O4 WE 13 24 A14 A5 14 23 A13 TRUTH TABLE A6 15 22 A12 A7 16 21 A11 Mode WEWEWEWEWE CECECECECE OEOEOEOEOE I/O Operation VDD Current A8 17 20 A10 Not Selected X H X High-Z ISB1, ISB2 A9 18 19 NC (Power-down) Output Disabled H L H High-Z ICC Read H L L DOUT ICC Write L L X DIN ICC 2 Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 Rev. C 04/15/05