IS61LV6416 IS61LV6416L ISSI 64K x 16 HIGH-SPEED CMOS STATIC RAM NOVEMBER 2005 WITH 3.3V SUPPLY FEATURES DESCRIPTION The ISSI IS61LV6416/IS61LV6416L is a high-speed, High-speed access time: 8, 10, 12 ns 1,048,576-bit static RAM organized as 65,536 words by 16 CMOS low power operation bits. It is fabricated using ISSI s high-performance CMOS 61LV6416: technology. This highly reliable process coupled with innovative circuit design techniques, yields access times 75 mW (typical) operating current as fast as 8 ns with low power consumption. 0.5 mW (typical) standby current 61LV6416L: When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be 65 mW (typical) operating current reduced down with CMOS input levels. 50 W (typical) standby current TTL compatible interface levels Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active Single 3.3V power supply LOW Write Enable (WE) controls both writing and reading Fully static operation: no clock or refresh of the memory. A data byte allows Upper Byte (UB) and required Lower Byte (LB) access. Three state outputs The IS61LV6416/IS61LV6416L is packaged in the JEDEC Data control for upper and lower bytes standard 44-pin 400-mil SOJ, 44-pin TSOP-II, and 48-pin Industrial temperature available mini BGA (6mm x 8mm). Lead-free available FUNCTIONAL BLOCK DIAGRAM 64K x 16 A0-A15 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CE OE CONTROL WE CIRCUIT UB LB Copyright 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. 1 Rev. I 11/22/05 IS61LV6416 ISSI IS61LV6416L PIN CONFIGURATIONS 44-Pin SOJ (K) 44-Pin TSOP-II (T) 44 A0 A15 1 44 A0 A15 1 43 A1 A14 2 43 A1 A14 2 A13 3 42 A2 42 A2 A13 3 A12 4 41 OE 41 OE A12 4 A11 5 40 UB 40 UB A11 5 CE 6 39 LB 39 LB CE 6 I/O0 7 38 I/O15 38 I/O15 I/O0 7 I/O1 8 37 I/O14 37 I/O14 I/O1 8 I/O2 9 36 I/O13 36 I/O13 I/O2 9 I/O3 10 35 I/O12 35 I/O12 I/O3 10 VDD 11 34 GND 34 GND VDD 11 GND 12 33 VDD 33 VDD GND 12 I/O4 13 32 I/O11 32 I/O11 I/O4 13 I/O5 14 31 I/O10 31 I/O10 I/O5 14 I/O6 15 30 I/O9 30 I/O9 I/O6 15 I/O7 16 29 I/O8 29 I/O8 I/O7 16 WE 17 28 NC 28 NC WE 17 A10 18 27 A3 27 A3 A10 18 A9 19 26 A4 26 A4 A9 19 A8 20 25 A5 25 A5 A8 20 A7 21 24 A6 24 A6 A7 21 NC 22 23 NC 23 NC NC 22 PIN DESCRIPTIONS 48-Pin mini BGA (6mm x 8mm) (B) A0-A15 Address Inputs 1 2 3 4 5 6 I/O0-I/O15 Data Inputs/Outputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input A0 A1 A2 A LB OE NC LB Lower-byte Control (I/O0-I/O7) UB A3 A4 I/O CE I/O B 8 0 UB Upper-byte Control (I/O8-I/O15) I/O I/O A5 A6 I/O I/O 9 10 1 2 C NC No Connection GND NC A7 I/O I/O VDD D 11 3 VDD I/O NC NC I/O GND VDD Power 12 4 E I/O I/O A14 A15 I/O I/O F 14 13 5 6 GND Ground I/O NC A12 WE 15 A13 I/O G 7 NC A10 A8 A9 A11 NC H 2 Integrated Silicon Solution, Inc. Rev. I 11/22/05