IS61WV1288EEBLL IS64WV1288EEBLL 128K x 8 HIGH SPEED ASYNCHRONOUS MAY 2020 CMOS STATIC RAM WITH ECC DESCRIPTION FEATURES The ISSI IS61/64WV1288EEBLL is a high-speed, High-speed access time: 8, 10 ns 1,048,576-bit static RAMs organized as 131,072 words by Low Active Power: 85 mW (typical) 8 bits. It is fabricated using ISSI s high-performance CMOS Low Standby Power: 7 mW (typical) technology. This highly reliable process coupled with inno- CMOS standby vative circuit design techniques, yields high-performance and low power consumption devices. Single power supply Fully static operation: no clock or refresh When CE is HIGH (deselected), the device assumes required a standby mode at which the power dissipation can be Three state outputs reduced down with CMOS input levels. Industrial and Automotive temperature support Easy memory expansion is provided by using Chip Enable Lead-free available and Output Enable inputs, CE and OE. The active LOW Error Detection and Error Correction Write Enable (WE) controls both writing and reading of the memory. The IS61/64WV1288EEBLL is packaged in the JEDEC standard 32-pin SOJ, TSOP-II, sTSOP-I, and 48-ball BGA (6mmx8mm). FUNCTIONAL BLOCK DIAGRAM ECC Array Memory Array A0-A16 Decoder (128Kx4) (128Kx8) 8 4 8 8 12 I/O Data IO0-7 ECC Column I/O Circuit /CE Control /OE Circuit /WE Copyright 2020 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat- est version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason- ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. B1 05/27/2020IS61/64WV1288EEBLL PIN CONFIGURATION PIN CONFIGURATION 32-Pin SOJ 32-Pin TSOP (Type II) (T) 32-Pin sTSOP (Type I) (H) A0 1 32 A16 A1 2 31 A15 A0 1 32 A16 A2 3 30 A14 A1 2 31 A15 A3 4 29 A13 A2 3 30 A14 CE 5 28 OE A3 4 29 A13 CE 5 28 OE I/O0 6 27 I/O7 I/O0 6 27 I/O7 I/O1 7 26 I/O6 I/O1 7 26 I/O6 VDD 8 25 GND VDD 8 25 GND GND 9 24 VDD GND 9 24 VDD I/O2 10 23 I/O5 I/O2 10 23 I/O5 I/O3 11 22 I/O4 I/O3 11 22 I/O4 WE 12 21 A12 WE 12 21 A12 A4 13 20 A11 A5 14 19 A10 A4 13 20 A11 18 A6 15 A9 A5 14 19 A10 A7 16 17 A8 A6 15 18 A9 A7 16 17 A8 PIN DESCRIPTIONS PIN CONFIGURATION 48-mini BGA (B) (6 mm x 8 mm) A0-A16 Address Inputs CE Chip Enable Input 1 2 3 4 5 6 OE Output Enable Input WE Write Enable Input I/O0-I/O7 Bidirectional Ports Vdd Power GND Ground A NC OE A2 A6 A7 NC A5 I/O NC A1 CE I/O B 0 7 I/O A4 1 NC A0 NC I/O6 C GND NC A3 D NC NC VDD VDD NC NC NC NC GND E I/O NC A14 A11 I/O I/O F 2 4 5 I/O NC A15 WE G 3 A12 A8 NC A10 A13 A16 A9 NC H 2 Integrated Silicon Solution, Inc. www.issi.com Rev. B1 05/27/2020