IS61WV204816BLL-10BLI ISSI

IS61/64WV204816ALL IS61/64WV204816BLL OCTOBER 2016 2Mx16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V/1.8V SUPPLY FEATURES High-speed access time: 10ns, 12ns DESCRIPTION The ISSI IS61/64WV204816ALL/BLL are high-speed, 32M High- performance, low power CMOS process bit static RAMs organized as 2048K words by 16 bits. It is Multiple center power and ground pins for fabricated using ISSI s high-performance CMOS technology. greater noise immunity Easy memory expansion with CS and OE This highly reliable process coupled with innovative circuit TTL compatible inputs and outputs design techniques, yields high-performance and low power Single power supply consumption devices. 1.65V-2.2V VDD (IS61/64WV204816ALL) When CS is HIGH (deselected), the device assumes a 2.4V-3.6V VDD (IS61/64WV204816BLL) standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory Packages available : expansion is provided by using Chip Enable and Output - 48 ball mini BGA (6mm x 8mm) Enable inputs. The active LOW Write Enable (WE ) - 48 pin TSOP (Type I) controls both writing and reading of the memory. A data Industrial and Automotive temperature support byte allows Upper Byte (UB ) and Lower Byte (LB ) access. Lead-free available The device is packaged in the JEDEC standard 48-Pin Data Control for upper and lower bytes TSOP (TYPE I) and 48-pin mini BGA (6mm x 8mm). FUNCTIONAL BLOCK DIAGRAM 2048K x 16 MEMORY DECODER A0 A20 ARRAY VDD VSS I/O 0 I/O7 I/ O Lower Byte COLUMN IO DATA I/O 8 I/O15 CIRCUIT Upper Byte CS OE CONTROL WE CIRCUIT UB LB Copyright 2016 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc.- www.issi.com 1 Rev. A 10/27/2016 IS61/64WV204816ALL IS61/64WV204816BLL PIN CONFIGURATIONS 48-Pin mini BGA (6mm x 8mm) 48-Pin TSOP ,TYPE I ( 12mm x 20mm ) 1 2 3 4 5 6 1 48 A5 A4 2 47 A6 A3 A 3 A2 46 A7 LB OE A0 A1 A2 NC 4 A8 A1 45 OE A0 5 44 NC 43 6 UB B 7 42 LB CS I/O8 UB A3 A4 CE I/O0 41 I/O15 I/O0 8 40 I/O14 I/O1 9 I/ 2 O 39 I/O13 10 C I/O9 I/O10 A5 A6 I/O1 I/O2 I/O3 11 I/O12 38 12 37 VSS VDD VSS 13 36 VDD I/O4 14 35 I/O11 D VSS I/O11 A17 A7 I/O3 VDD I/O5 15 34 I/O10 I/O6 33 I/O9 16 17 32 I/O8 I/O7 31 E WE 18 A20 VDD I/O12 NC A16 I/O4 VSS 30 A 9 NC 19 A19 20 29 A10 21 28 A11 A18 A17 A12 F 22 27 I/O14 I/O13 A14 A15 I/O5 I/O6 A16 23 26 A13 24 25 A14 A15 G I/O15 A19 A12 A13 WE I/O7 H A18 A8 A9 A10 A11 A20 PIN DESCRIPTIONS A0-A20 Address Inputs I/O0-I/O15 Data Inputs/Outputs CS Chip Enable Input OE Output Enable Input WE Write Enable Input LB Lower-byte Control (I/O0-I/O7) UB Upper-byte Control (I/O8-I/O15) NC No Connection VDD Power VSS Ground Integrated Silicon Solution, Inc.- www.issi.com 2 Rev. A 10/27/2016