IS61WV51216BLL-10MLI ISSI

IS61WV51216ALL IS61WV51216BLL IS64WV51216BLL 512K x 16 HIGH-SPEED ASYNCHRONOUS OCTOBER 2009 CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES DESCRIPTION The ISSI IS61WV51216ALL/BLL and IS64WV51216BLL High-speed access times: are high-speed, 8M-bit static RAMs organized as 512K 8, 10, 20 ns words by 16 bits. It is fabricated using ISSI s high-perform- High-performance, low-power CMOS process ance CMOS technology. This highly reliable process coupled Multiple center power and ground pins for greater with innovative circuit design techniques, yields high-perfor- noise immunity mance and low power consumption devices. Easy memory expansion with CE and OE op- tions When CE is HIGH (deselected), the device assumes a CE power-down standby mode at which the power dissipation can be reduced down with CMOS input levels. Fully static operation: no clock or refresh required Easy memory expansion is provided by using Chip Enable TTL compatible inputs and outputs and Output Enable inputs, CE and OE. The active LOW Single power supply Write Enable (WE) controls both writing and reading of the VDD 1.65V to 2.2V (IS61WV51216ALL) memory. A data byte allows Upper Byte (UB) and Lower speed = 20ns for VDD 1.65V to 2.2V Byte (LB) access. VDD 2.4V to 3.6V (IS61/64WV51216BLL) The device is packaged in the JEDEC standard 44-pin speed = 10ns for VDD 2.4V to 3.6V TSOP Type II and 48-pin Mini BGA (9mm x 11mm). speed = 8ns for VDD 3.3V + 5% Packages available: 48-ball miniBGA (9mm x 11mm) 44-pin TSOP (Type II) Industrial and Automotive Temperature Support Lead-free available Data control for upper and lower bytes FUNCTIONAL BLOCK DIAGRAM 512K x 16 A0-A18 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CE OE CONTROL WE CIRCUIT UB LB Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. www.issi.com 1 Rev. F 10/01/09IS61WV51216ALL IS61WV51216BLL IS64WV51216BLL 48-pin mini BGA (9mmx11mm) 1 2 3 4 5 6 A LB OE A0 A1 A2 NC I/O UB A3 A4 CE I/O B 8 0 I/O I/O A5 A6 I/O I/O 9 10 1 2 C GND A7 I/O A17 I/O VDD D 11 3 I/O GND VDD I/O12 NC A16 4 E I/O A14 I/O 14 I/O A15 5 I/O F 13 6 I/O NC A12 A13 WE I/O G 15 7 A18 A8 A9 A10 A11 NC H PIN DESCRIPTIONS A0-A18 Address Inputs I/O0-I/O15 Data Inputs/Outputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input LB Lower-byte Control (I/O0-I/O7) UB Upper-byte Control (I/O8-I/O15) NC No Connection VDD Power GND Ground 2 Integrated Silicon Solution, Inc. www.issi.com Rev. F 10/01/09