IS62WV25616EALL/EBLL/ECLL IS65WV25616EBLL/ECLL NOVEMBER 2018 256Kx16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM KEY FEATURES DESCRIPTION The ISSI IS62/65WV25616EALL/EBLL/ECLL are high-speed, High-speed access time: 35ns, 45ns, 55ns low power, 4M bit static RAMs organized as 256K words by CMOS low power operation 16 bits. It is fabricated using ISSI s high-performance CMOS Operating Current: 22 mA (max) at 85C technology. CMOS Standby Current: 3.7uA (typ) at 25C This highly reliable process coupled with innovative circuit TTL compatible interface levels design techniques, yields high-performance and low power consumption devices. When CS1 is HIGH (deselected) or Single power supply when CS2 is LOW (deselected) or when CS1 is LOW, CS2 1.65V-2.2V VDD (IS62/65WV25616EALL) is HIGH and both LB and UB are HIGH, the device 2.2V-3.6V VDD (IS62/65WV25616EBLL) assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. 3.3V +/-5% VDD (IS62/65WV25616ECLL) Easy memory expansion is provided by using Chip Enable Package : 44-pin TSOP (Type II) and Output Enable inputs. The active LOW Write Enable 48-pin mini BGA (WE ) controls both writing and reading of the memory. A data Commercial, Industrial and Automotive byte allows Upper Byte (UB ) and Lower Byte (LB ) access. temperature support The IS62/65WV25616EALL/EBLL/ECLL are packaged in the JEDEC standard 48-pin mini BGA (6mm x 8mm) and 44-Pin Lead-free available TSOP (TYPE II). FUNCTIONAL BLOCK DIAGRAM 256K x 16 MEMORY DECODER A0 A17 ARRAY VDD GND I/O0 I/O7 I/O Lower Byte COLUMN I/O DATA I/O8 I/O15 CIRCUIT Upper Byte CS2 CS1 CONTROL OE CIRCUIT WE UB LB Copyright 2018 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc.- www.issi.com 1 Rev. A3 11/27/2018 IS62WV25616EALL/EBLL/ECLL IS65WV25616EBLL/ECLL PIN CONFIGURATIONS 48-Pin mini BGA (6mm x 8mm) 48-Pin mini BGA (6mm x 8mm) 2 CS Option 1 2 3 4 5 6 1 2 3 4 5 6 A A LB OE A0 A1 A2 NC LB OE A0 A1 A2 CS2 B B I/O8 UB A3 A4 CS I/O0 I/O8 UB A3 A4 CS1 I/O0 I/O9 I/O10 A5 A6 I/O1 I/O2 C I/O9 I/O10 A5 A6 I/O1 I/O2 C D D GND I/O11 A17 A7 I/O3 VDD GND I/O11 A17 A7 I/O3 VDD E VDD I/O12 NC A16 I/O4 GND E VDD I/O12 NC A16 I/O4 GND F F I/O14 I/O13 A14 A15 I/O5 I/O6 I/O14 I/O13 A14 A15 I/O5 I/O6 G G I/O15 NC A12 A13 WE I/O7 I/O15 NC A12 A13 WE I/O7 H NC A8 A9 A10 A11 NC H NC A8 A9 A10 A11 NC PIN DESCRIPTIONS 44-Pin mini TSOP (Type II) A0-A17 Address Inputs I/O0-I/O15 Data Inputs/Outputs 1 A5 A4 44 2 A6 CS1 , CS2 Chip Enable Input A3 43 A7 A2 3 42 CS Chip Enable Input 4 OE A1 41 OE Output Enable Input UB A0 5 40 6 LB CS 39 WE Write Enable Input 7 I/O15 I/O0 38 LB Lower-byte Control 37 I/O14 8 I/O1 (I/O0-I/O7) I/O13 9 I/O2 36 10 I/O12 UB Upper-byte Control I/O3 35 VDD GND 11 34 (I/O8-I/O15) GND 12 33 VDD NC No Connection I/O11 I/O4 13 32 VDD Power I/O10 I/O5 14 31 30 I/O9 I/O6 15 GND Ground 29 I/O8 I/O7 16 NC 28 WE 17 A8 A16 18 27 19 A9 A15 26 A10 A14 20 25 24 A11 A13 21 23 A17 A12 22 Integrated Silicon Solution, Inc.- www.issi.com 2 Rev. A3 11/27/2018