IS62/65WV2568DALL IS62/65WV2568DBLL 256K x 8 LOW VOLTAGE, JULY 2017 ULTRA LOW POWER CMOS STATIC RAM FEATURES DESCRIPTION High-speed access time: 35ns, 45ns, 55ns The ISSI IS62/65WV2568DALL and IS62/65WV2568DBLL a re h ig h -s pe e d, 2 M b it s ta ti c R AM s o rg an i z e d a s CMOS low power operation 256K words by 8 bits. It is fabr icated using ISSI s high- 36 mW (typical) operating perfor mance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields 9 W (typical) CMOS standby high-performance and low power consumption devices. TTL compatible interface levels When CS1 is HIGH (deselected) or when CS2 is LOW Single power supply (deselected) , the device assumes a standby mode at 1.8V 10% Vcc (IS62/65WV2568DALL) which the power dissipation can be reduced down with CMOS input levels. 2.5V3.6V Vcc (IS62/65WV2568DBLL) Easy memory expansion is provided by using Chip Enable Fully static operation: no clock or refresh and Output Enable inputs. The active LOW Wr ite Enable required (WE) controls both writing and reading of the memory. Three state outputs The IS62/65WV2568DALL and IS62/65WV2568DBLL are Industr ial temperature available packaged in the JEDEC standard 32-pin TSOP (TYPE I), sTSOP (TYPE I), and 36-pin mini BGA. Lead-free available FUNCTIONAL BLOCK DIAGRAM 256K x 8 A0-A17 DECODER MEMORY ARRAY VCC GND I/O COLUMN I/O DATA I/O0-I/O7 CIRCUIT CS2 CS1 CONTROL CIRCUIT OE WE Copyright 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason- ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 1 Rev. C1 07/05/2017IS62/65WV2568DALL, IS62/65WV2568DBLL PIN DESCRIPTIONS A0-A17 Address Inputs CS1 Chip Enable 1 Input CS2 Chip Enable 2 Input OE Output Enable Input WE Wr ite Enable Input I/O0-I/O7 Input/Output NC No Connection Vcc Power GND Ground PIN CONFIGURATION 36-pin mini BGA (B) (6mm x 8mm) 32-pin TSOP (TYPE I), sTSOP (TYPE I) 1 2 3 4 5 6 A11 1 32 OE A9 2 31 A10 A8 3 30 CS1 A A0 A1 CS2 A3 A6 A8 A13 4 29 I/O7 WE 5 28 I/O6 B I/O4 A2 WE A4 A7 I/O0 CS2 6 27 I/O5 C I/O5 NC A5 I/O1 A15 7 26 I/O4 VCC 8 25 I/O3 GND Vcc D 24 GND A17 9 Vcc GND E A16 10 23 I/O2 A14 11 22 I/O1 F I/O6 NC A17 I/O2 A12 12 21 I/O0 I/O7 OE CS1 A16 A15 I/O3 G A7 13 20 A0 A6 14 19 A1 A9 A10 A12 A13 A14 A11 H A5 15 18 A2 A4 16 17 A3 2 Integrated Silicon Solution, Inc. www.issi.com Rev. C1 07/05/2017