IS62WV5128ALL Long-term Support World Class Quality IS62WV5128BLL NOVEMBER 2016 512K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES DESCRIPTION The ISSI IS62WV5128ALL / IS62WV5128BLL are high- High-speed access time: 55ns, 70ns speed, 4M bit static RAMs organized as 512K words by CMOS low power operation 8 bits. It is fabr icated using ISSI s high-perfor mance CMOS technology. This highly reliable process coupled 36 mW (typical) operating with innovative circuit design techniques, yields high- 9 W (typical) CMOS standby performance and low power consumption devices. TTL compatible interface levels When CS1 is HIGH (deselected) the device assumes a standby mode at which the power dissipation can be Single power supply reduced down with CMOS input levels. 1.65V 2.2V Vdd (IS62WV5128ALL) Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Wr ite Enable 2.5V 3.6V Vdd (IS62WV5128BLL) (WE) controls both writing and reading of the memory. Fully static operation: no clock or refresh The IS62WV5128ALL and IS62WV5128BLL are packaged required in the JEDEC standard 32-pin TSOP (TYPE I), 32-pin sTSOP (TYPE I), 32-pin TSOP (Type II), 32-pin SOP and Three state outputs 36-pin mini BGA. Industr ial temperature available Lead-free available FUNCTIONAL BLOCK DIAGRAM 512K x 8 A0-A18 DECODER MEMORY ARRAY VDD GND I/O COLUMN I/O DATA I/O0-I/O7 CIRCUIT CS1 CONTROL CIRCUIT OE WE Copyright 2016 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. www.issi.com 1 Rev. E1 11/1/2016 Long-term Support World Class Quality IS62WV5128ALL, IS62WV5128BLL PIN DESCRIPTIONS A0-A18 Address Inputs CS1 Chip Enable 1 Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Input/Output NC No Connection Vdd Power GND Ground 36-pin mini BGA (B) (6mm x 8mm) (Package Code B) 1 2 3 4 5 6 A A0 A1 NC A3 A6 A8 B I/O4 A2 WE A4 A7 I/O0 I/O5 NC A5 I/O1 C GND VDD D E VDD GND F I/O6 A18 A17 I/O2 I/O7 OE CS1 A16 A15 I/O3 G A9 A10 A11 A12 A13 A14 H 2 Integrated Silicon Solution, Inc. www.issi.com Rev. E1 11/1/16