IS64LV25616AL ISSI 256K x 16 HIGH SPEED ASYNCHRONOUS JULY 2006 CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES DESCRIPTION High-speed access time: 10, 12 ns The ISSI IS64LV25616AL is a high-speed, 4,194,304-bit static RAM organized as 262,144 words by 16 bits. It is CMOS low power operation fabricated using ISSI s high-performance CMOS technol- Low stand-by power: ogy. This highly reliable process coupled with innovative Less than 5 mA (typ.) CMOS stand-by circuit design techniques, yields high-performance and low power consumption devices. TTL compatible interface levels Single 3.3V power supply When CE is HIGH (deselected), the device assumes a Fully static operation: no clock or refresh standby mode at which the power dissipation can be required reduced down with CMOS input levels. Three state outputs Easy memory expansion is provided by using Chip Enable Data control for upper and lower bytes and Output Enable inputs, CE and OE. The active LOW Industrial temperature available Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Temperature Offerings: Byte (LB) access. o o Option A1: 40 C to +85 C o o Option A2: 40 C to +105 C The IS64LV25616AL is packaged in the JEDEC standard o o 44-pin TSOP Type II and 48-pin Mini BGA (8mm x 10mm). Option A3: 40 C to +125 C Lead-free available FUNCTIONAL BLOCK DIAGRAM 256K x 16 A0-A17 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CE OE CONTROL WE CIRCUIT UB LB Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 1 Rev. D 07/05/06 IS64LV25616AL ISSI TRUTH TABLE I/O PIN WEWE CECE OEOE LBLB UBUB Mode WEWEWE CECECE OEOEOE LBLBLB UBUBUB I/O0-I/O7 I/O8-I/O15 VDD Current Not Selected X H X X X High-Z High-Z ISB1, ISB2 Output Disabled H L H X X High-Z High-Z ICC X L X H H High-Z High-Z Read H L L L H DOUT High-Z ICC H L L H L High-Z DOUT H LLL L DOUT DOUT Write L L X L H DIN High-Z ICC L L X H L High-Z DIN LL X L L DIN DIN PIN CONFIGURATIONS PIN DESCRIPTIONS 44-Pin TSOP (Type II) A0-A17 Address Inputs I/O0-I/O15 Data Inputs/Outputs CE Chip Enable Input A0 1 44 A17 OE Output Enable Input A1 2 43 A16 A2 3 42 A15 WE Write Enable Input A3 4 41 OE LB Lower-byte Control (I/O0-I/O7) A4 5 40 UB CE 6 39 LB UB Upper-byte Control (I/O8-I/O15) I/O0 7 38 I/O15 I/O1 8 37 I/O14 NC No Connection I/O2 9 36 I/O13 VDD Power I/O3 10 35 I/O12 VDD 11 34 GND GND Ground GND 12 33 VDD I/O4 13 32 I/O11 I/O5 14 31 I/O10 I/O6 15 30 I/O9 I/O7 16 29 I/O8 WE 17 28 NC A5 18 27 A14 A6 19 26 A13 A7 20 25 A12 A8 21 24 A11 A9 22 23 A10 2 Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 Rev. D 07/05/06