IS65WV12816ALL IS65WV12816BLL NOVEMBER 2007 128K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES DESCRIPTION The ISSI IS65WV12816ALL/ IS65WV12816BLL are high- High-speed access time: 55ns, 70ns speed, 2M bit static RAMs organized as 128K words by 16 CMOS low power operation: bits. It is fabricated using ISSI s high-performance CMOS 36 mW (typical) operating technology. This highly reliable process coupled with innovative circuit design techniques, yields high- 9 W (typical) CMOS standby performance and low power consumption devices. TTL compatible interface levels When CS1 is HIGH (deselected) or when CS2 is LOW Single power supply: (deselected) or when CS1 is LOW, CS2 is HIGH and both 1.65V to 2.2V VDD (65WV12816ALL) LB and UB are HIGH, the device assumes a standby mode 2.5V to 3.6V VDD (65WV12816BLL) at which the power dissipation can be reduced down with CMOS input levels. Fully static operation: no clock or refresh required Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable Three state outputs (WE) controls both writing and reading of the memory. A Data control for upper and lower bytes data byte allows Upper Byte (UB) and Lower Byte (LB) 2CS Option Available access. Temperature Offerings: The IS65WV12816ALL and IS65WV12816BLL are packged o in the JEDEC standard 48-pin mini BGA (6mm x 8mm) and Option A: 0 to 70 C 44-Pin TSOP (TYPE II). o Option A1: 40 to +85 C o Option A2: 40 to +105 C o Option A3: 40 to +125 C Lead-free available FUNCTIONAL BLOCK DIAGRAM 128K x 16 A0-A16 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CS2 CS1 OE CONTROL CIRCUIT WE UB LB Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 1 Rev. B 11/09/07IS65WV12816ALL, IS65WV12816BLL PIN CONFIGURATIONS 48-Pin mini BGA (6mm x 8mm) 48-Pin mini BGA (6mm x 8mm) 2 CS Option (Package Code B2) (Package Code B) 1 2 3 4 5 6 1 2 3 4 5 6 A LB OE A0 A1 A2 N/C A LB OE A0 A1 A2 CS2 I/O UB A3 A4 CSI I/O I/O UB A3 A4 CS1 I/O B 8 0 B 8 0 I/O I/O A5 A6 I/O I/O I/O I/O A5 A6 I/O I/O 9 10 1 2 9 10 1 2 C C GND I/O NC A7 I/O VDD GND I/O NC A7 I/O VDD D 11 3 D 11 3 VDD I/O NC A16 I/O4 GND VDD I/O NC A16 I/O4 GND E 12 E 12 I/O I/O A14 A15 I/O I/O I/O I/O A14 A15 I/O I/O F 14 13 5 6 F 14 13 5 6 I/O NC A12 WE I/O NC A12 WE 15 A13 I/O7 15 A13 I/O7 G G NC A8 A9 A10 A11 NC NC A8 A9 A10 A11 NC H H 44-Pin mini TSOP (Type II) PIN DESCRIPTIONS (Package Code T) A0-A16 Address Inputs I/O0-I/O15 Data Inputs/Outputs A4 1 44 A5 CS1, CS2 Chip Enable Input A3 2 43 A6 A2 3 42 A7 OE Output Enable Input A1 4 41 OE WE Write Enable Input A0 5 40 UB CS1 6 39 LB LB Lower-byte Control (I/O0-I/O7) I/O0 7 38 I/O15 I/O1 8 37 I/O14 UB Upper-byte Control (I/O8-I/O15) I/O2 9 36 I/O13 I/O3 10 35 I/O12 NC No Connection VDD 11 34 GND GND 12 33 VDD VDD Power I/O4 13 32 I/O11 I/O5 14 31 I/O10 GND Ground I/O6 15 30 I/O9 I/O7 16 29 I/O8 WE 17 28 NC A16 18 27 A8 A15 19 26 A9 A14 20 25 A10 A13 21 24 A11 A12 22 23 NC 2 Integrated Silicon Solution, Inc. www.issi.com 1-800-379-4774 Rev. B 11/09/07