IS66WV51216DALL IS66/67WV51216DBLL AUGUST 2014 8Mb LOW VOLTAGE, ULTRA LOW POWER PSEUDO CMOS STATIC RAM FEA TURES DESCRIPTION High-speed access time: The ISSI IS66WV51216DALL and IS66/67WV51216DBLL 70ns (IS66WV51216DALL, IS66/67WV51216DBLL) are high-speed, 8M bit static RAMs organized as 512K 55ns (IS66/67WV51216DBLL) words by 16 bits. It is fabricated using ISSI s high- perfor mance CMOS technology. This highly reliable process CMOS low power operation coupled with innovative circuit design techniques, yields Single power supply high-perfor mance and low power consumption devices. Vdd = 1.7V-1.95V (IS66WV51216d ALL) When CS1 is HIGH (deselected) or when CS2 is LOw Vdd = 2.5V-3.6V (IS66/67WV51216BLL)d (deselected) or when CS1 is LOw , CS2 is HIGH and both LB and UB are HIGH, the device assumes a standby mode Three state outputs at which the power dissipation can be reduced down with Data control for upper and lower bytes CMOS input levels. Industr ial temperature available Easy memory expansion is provided by using Chip Enable Lead-free available and Output Enable inputs. The active LOw wr ite Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS66wV51216DALL and IS66/67wV51216DBLL are packaged in the JEDEC standard 48-ball mini BGA (6mm x 8mm) and 44-Pin TSOP (TYPE II). The device is aslo available for die sales. FUNCTIONAL BLOCK DIAGRAM 512K x 16 A0-A18 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CS2 CS1 OE CONTROL CIRCUIT WE UB LB Copyright 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. C 08/25/2014IS66WV51216DALL IS66/67WV51216DBLL PIN CONFIGURATIONS: 48-Ball mini BGA (6mm x 8mm) 44-Pin TSOP (Type II) 1 2 3 4 5 6 44 A4 1 A5 A3 2 43 A6 A2 3 42 A7 A1 4 41 OE A0 5 40 UB LB A0 A1 A2 A OE CS2 CS1 6 39 LB I/O0 7 38 I/O15 A4 I/O UB A3 CS1 I/O B 8 0 I/O1 8 37 I/O14 I/O2 9 36 I/O13 I/O I/O A5 A6 I/O I/O C 9 10 1 2 I/O3 10 35 I/O12 VDD 11 34 GND GND A17 A7 I/O I/O VDD D 11 3 GND 12 33 VDD I/O GND VDD I/O NC A16 4 I/O4 13 32 I/O11 E 12 I/O5 14 31 I/O10 I/O I/O A14 A15 I/O I/O F 14 13 5 6 I/O6 15 30 I/O9 I/O7 16 29 I/O8 I/O NC A12 WE 15 A13 I/O G 7 WE 17 28 A18 A16 18 27 A8 A18 A8 A9 A10 A11 NC H A15 19 26 A9 A14 20 25 A10 A13 21 24 A11 A12 22 23 A17 PIN DESCRIPTIONS A0-A18 Address Inputs I/O0-I/O15 Data Inputs/Outputs CS1, CS2 Chip Enable Input OE Output Enable Input WE Write Enable Input LB Lower-byte Control (I/O0-I/O7) UB Upper-byte Control (I/O8-I/O15) NC No Connection Vdd Power GND Ground 2 Integrated Silicon Solution, Inc. www.issi.com Rev. C 08/25/2014