2 ISO -CMOS MT8960/61/62/63/64/65/66/67 Integrated PCM Filter Codec Data Sheet November 2005 Features ST-BUS compatible Ordering Information MT8960/61/64/65AE 18 Pin PDIP Tubes Transmit/Receive filters & PCM Codec in one I.C MT8962/63AE 20 Pin PDIP Tubes MT8962/63/66/67AS 20 Pin SOIC Tubes Meets AT&T D3/D4 and CCITT G711 and G712 MT8963/66ASR 20 Pin SOIC Tape & Reel MT8960/64/65AE1 18 Pin PDIP* Tubes -Law: MT8960/62/64/67 MT8961AE1 18 Pin PDIP* Tubes MT8962ASR1 20 Pin SOIC* Tape & Reel A-Law: MT8961/63/65/67 MT8962/63AE1 20 Pin PDIP* Tubes MT8962/66AS1 20 Pin SOIC* Tubes Low power consumption: MT8963AS1 20 Pin SOIC* Tubes MT8963ASR1 20 Pin SOIC* Tape & Reel Op.: 30 mW typ. MT8967AS1 20 Pin SOIC* Tubes MT8966/67ASR1 20 Pin SOIC* Tape & Reel Stby.: 2.5 mW typ. *Pb Free Matte Tin Digital Coding Options: -40C to +85C MT8964/65/66/67 CCITT Code MT8960/61/62/63 Alternative Code Description Digitally controlled gain adjust of both filters 2 Analog and digital loopback Manufactured in ISO-CMOS, these integrated filter/codecs are designed to meet the demanding Filters and codec independently user accessible performance needs of the digital telecommunications for testing industry, e.g., PABX, Central Office, Digital telephones. Powerdown mode available 2.048 MHz master clock input Up to six uncommitted control outputs 5 V 5% power supply ANUL Analog to Transmit Output V Digital PCM DSTo X Register Filter Encoder SD0 CSTi SD1 A Register CA Output SD2 8-Bits Register Control F1i SD3 Logic SD4 C2i B-Register SD5 8-Bits PCM Digital Input Receive to Analog DSTi V R Register Decoder Filter V GNDA GNDD V V Ref DD EE Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003-2005, Zarlink Semiconductor Inc. All Rights Reserved.MT8960/61/62/63/64/65/66/67 Data Sheet MT8962/63/66/67 MT8960/61/64/65 20 CSTi 1 GNDD 1 18 CSTi GNDD 2 19 DSTi VRef 2 17 DSTi VRef 18 C2i 3 GNDA 3 16 C2i GNDA 17 DSTo 4 VR 15 DSTo 4 VR 5 16 VDD ANUL 5 VDD 14 ANUL 15 SD5 6 VX F1i 13 6 VX 14 SD4 7 VEE CA 12 7 VEE 13 F1i 8 SD0 SD3 11 SD0 8 12 CA 9 SD1 SD2 10 SD1 9 SD3 10 11 SD2 18 PIN PDIP 20 PIN PDIP/SOIC Figure 2 - Pin Connections Pin Description Pin Name Description CSTi Control ST-BUS In is a TTL-compatible digital input used to control the function of the filter/codec. Three modes of operation may be effected by applying to this input a logic high (V ), logic low DD (GNDD), or an 8-bit serial word, depending on the logic states of CA and F1i. Functions controlled are: powerdown, filter gain adjust, loopback, chip testing, SD outputs. DSTi Data ST-BUS In accepts the incoming 8-bit PCM word. Input is TTL-compatible. C2i Clock Input is a TTL-compatible 2.048 MHz clock. DSTo Data ST-BUS Out is a three-state digital output driving the PCM bus with the outgoing 8-bit PCM word. V Positive power Supply (+5 V). DD F1i Synchronization Input is an active low digital input enabling (in conjunction with CA) the PCM input, PCM output and digital control input. It is internally sampled on every positive edge of the clock, C2i, and provides frame and channel synchronization. CA Control Address is a three-level digital input which enables PCM input and output and determines into which control register (A or B) the serial data, presented to CSTi, is stored. SD3 System Drive Output is an open drain output of an N-channel transistor which has its source tied to GNDA. Inactive state is open circuit. SD4-5 System Drive Outputs are open drain outputs of N-channel transistors which have their source tied to GNDD. Inactive state is open circuit. SD0-2 System Drive Outputs are Totempole CMOS outputs switching between GNDD and V . Inactive DD state is logic low. V Negative power supply (-5 V). EE V Voice Transmit is the analog input to the transmit filter. X ANUL Auto Null is used to integrate an internal auto-null signal. A 0.1 F capacitor must be connected between this pin and GNDA. V Voice Receive is the analog output of the receive filter. R GNDA Analog ground (0 V). V Voltage Reference input to D to A converter. Ref GNDD Digital ground (0 V). 2 Zarlink Semiconductor Inc.