64 Mbit SPI Serial Dual I/O Flash SST25VF064C SST25VF032B32Mb Serial Peripheral Interface (SPI) flash memory Data Sheet FEATURES: Single Voltage Read and Write Operations Fast Erase 2.7-3.6V Chip-Erase Time: 35 ms (typical) Sector-/Block-Erase Time: 18 ms (typical) Serial Interface Architecture Page-Program SPI Compatible: Mode 0 and Mode 3 256 Bytes per page Dual Input/Output Support Single and Dual Input support Fast-Read Dual-Output Instruction Fast Page-Program time in 1.5 ms (typical) Fast-Read Dual I/O Instruction End-of-Write Detection High Speed Clock Frequency Software polling the BUSY bit in Status Register 80 MHz for High-Speed Read (0BH) Write Protection (WP ) 75 MHz for Fast-Read Dual-Output (3BH) 50 MHz for Fast-Read Dual I/O (BBH) Enables/Disables the Lock-Down function of the 33 MHz for Read Instruction (03H) status register Superior Reliability Software Write Protection Endurance: 100,000 Cycles (typical) Write protection through Block-Protection bits in sta- Greater than 100 years Data Retention tus register Low Power Consumption Security ID Active Read Current: 12 mA (typical 80 MHz) for One-Time Programmable (OTP) 256 bit, Secure ID single-bit read) - 64 bit Unique, Factory Pre-Programmed identifier Active Read Current: 14 mA (typical 75MHz) for - 192 bit User-Programmable dual-bit read) Temperature Range Standby Current: 5 A (typical) Commercial = 0C to +70C Flexible Erase Capability Industrial: -40C to +85C Uniform 4 KByte sectors Packages Available Uniform 32 KByte overlay blocks 16-lead SOIC (300 mils) Uniform 64 KByte overlay blocks 8-contact WSON (6mm x 8mm) 8-lead SOIC (200 mils) All devices are RoHS compliant PRODUCT DESCRIPTION The SST 25 series Serial Flash family features a four-wire, ply of 2.7-3.6V. The total energy consumed is a function of SPI-compatible interface that allows for a low pin-count the applied voltage, current, and time of application. Since package which occupies less board space and ultimately for any given voltage range, the SuperFlash technology lowers total system costs. SST25VF064C SPI serial flash uses less current to program and has a shorter erase time, memory is manufactured with SST proprietary, high-perfor- the total energy consumed during any Erase or Program mance CMOS SuperFlash technology. The split-gate cell operation is less than alternative flash memory technolo- design and thick-oxide tunneling injector attain better reli- gies. ability and manufacturability compared with alternate The SST25VF064C device is offered in 16-lead SOIC (300 approaches. mils), 8-contact WSON (6mm x 8mm), and 8-lead SOIC The SST25VF064C significantly improves performance (200 mils) packages. See Figure 2 for pin assignments. and reliability, while lowering power consumption. The device writes (Program or Erase) with a single power sup- 2010 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered Trademarks of Silicon Storage Technology, Inc. S71392-04-000 04/10 These specifications are subject to change without notice. 164 Mbit SPI Serial Dual I/O Flash SST25VF064C Data Sheet SuperFlash X - Decoder Memory Address Buffers and Latches Y - Decoder Page Buffer, I/O Buffers Control Logic and Data Latches Serial Interface CE SCK SI/SIO SO/SIO WP RST /HOLD 0 1 1392 B1.0 FIGURE 1: Functional Block Diagram 2010 Silicon Storage Technology, Inc. S71392-04-000 04/10 2