SY100EL15ZG-TR Microchip

Precision Edge SY10EL15 Precision Edge Micrel, Inc. SY100EL15 1:4 CLOCK SY10EL15 DISTRIBUTION SY100EL15 FEATURES 50ps output-to-output skew Precision Edge Synchronous enable/disable Multiplexed clock input DESCRIPTION 75K internal input pull-down resistors Available in 16-pin SOIC package The SY10/100EL15 are low skew 1:4 clock distribution chips designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. If a single-ended input is to be used the VBB output should be connected to the CLK input and bypassed to VCC via a 0.01 F capacitor. The VBB output is designed to act as the switching reference for the input of the EL15 under single- ended input conditions, as a result this pin can only source/sink up to 0.5mA of current. The EL15 features a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along with the high speed system clock. When LOW (or left open and pulled LOW by the input pull-down resistor) the SEL pin will select the differential clock input. The common enable (EN) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/ disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock, therefore all associated specification limits are referenced to the negative edge of the clock input. Precision Edge is a registered trademark of Micrel, Inc. Rev.: H Amendment: /0 M9999-031006 1 Issue Date: March 2006 1 hbwhelp micrel.com or (408) 955-1690 Precision Edge SY10EL15 Micrel, Inc. SY100EL15 PACKAGE/ORDERING INFORMATION (1) Ordering Information CLK CLK VBB EN SCLK SEL VEE Package Operating Package Lead 16 15 14 13 12 11 10 9 Part Number Type Range Marking Finish SY10EL15ZC Z16-2 Commercial SY10EL15ZC Sn-Pb 1 0 (2) SY10EL15ZCTR Z16-2 Commercial SY10EL15ZC Sn-Pb D Q SY100EL15ZC Z16-2 Commercial SY100EL15ZC Sn-Pb (2) SY100EL15ZCTR Z16-2 Commercial SY100EL15ZC Sn-Pb SY10EL15ZI Z16-2 Industrial SY10EL15ZI Sn-Pb 2 3 456 7 8 1 (2) SY10EL15ZITR Z16-2 Industrial SY10EL15ZI Sn-Pb Q0 Q0 Q1 Q1 Q2 Q3 Q2 SY100EL15ZI Z16-2 Industrial SY100EL15ZI Sn-Pb (2) 16-Pin Narrow SOIC (Z8-1) SY100EL15ZITR Z16-2 Industrial SY100EL15ZI Sn-Pb (3) SY10EL15ZG Z16-2 Industrial SY10EL15ZG with Pb-Free Pb-Free bar-line indicator NiPdAu (2, 3) SY10EL15ZGTR Z16-2 Industrial SY10EL15ZG with Pb-Free Pb-Free bar-line indicator NiPdAu (3) SY100EL15ZG Z16-2 Industrial SY100EL15ZG with Pb-Free Pb-Free bar-line indicator NiPdAu (2, 3) SY100EL15ZGTR Z16-2 Industrial SY100EL15ZG with Pb-Free Pb-Free bar-line indicator NiPdAu Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25C, DC Electricals only. A 2. Tape and Reel. 3. Pb-Free package is recommended for new designs. PIN NAMES TRUTH TABLE Pin Function CLK SCLK SEL EN Q CLK Differential Clock Inputs L X LLL SCLK Synchronous Clock Input HX L L H EN Synchronous Enable XL H L L XH H L H SEL Clock Select Input VBB Reference Output XX X H L* Q0-3 Differential Clock Outputs * On next negative transition of CLK or SCLK M9999-031006 2 hbwhelp micrel.com or (408) 955-1690 VCC Q3