NOT RECOMMENDED FOR NEW DESIGNS Precision Edge SY100S838 Precision Edge Micrel, Inc. (1, 2/3) OR (2, 4/6) SY100S838L SY100S838 CLOCK GENERATION CHIP SY100S838L FEATURES 3.3V and 5V power supply options Precision Edge 50ps output-to-output skew Synchronous enable/disable DESCRIPTION Master Reset for synchronization Internal 75K input pull-down resistors The SY100S838/L is a low skew (1, 2/3) or (2, 4/ Available in 20-pin SOIC package 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven TRUTH TABLE by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. In addition, CLK EN MR Function by using the VBB output, a sinusoidal source can be AC- ZL L Divide coupled into the device. If a single-ended input is to be used, the VBB output should be connected to the CLK ZZ H L Hold Q03 input and bypassed to ground via a 0.01F capacitor. XX H Reset Q03 The VBB output is designed to act as the switching NOTES: reference for the input of the SY100S838/L under single- Z = LOW-to-HIGH transition ended input conditions. As a result, this pin can only ZZ = HIGH-to-LOW transition source/sink up to 0.5mA of current. The Function Select (FSEL) input is used to determine what clock generation chip function is. When FSEL input FSEL DIVSEL Q0, Q1 OUTPUTS Q2, Q3 OUTPUTS is LOW, SY100S838/L functions as a divide by 2 and by 4/6 clock generation chip. However, if FSEL input is HIGH, LL Divide by 2 Divide by 4 it functions as a divide by 1 and by 2/3 clock chip. LH Divide by 2 Divide by 6 The common enable (EN) is synchronous so that the HL Divide by 1 Divide by 2 internal dividers will only be enabled/disabled when the internal clock is already in the LOW state. This avoids HH Divide by 1 Divide by 3 any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an asynchronous control. An internal runt pulse could lead to losing synchronization between PIN NAMES the internal divider stages. The internal enable flip-flop is clocked on the falling edge of the input clock, therefore, Pin Function all associated specification limits are referenced to the negative edge of the clock input. CLK Differential Clock Inputs Upon start-up, the internal flip-flops will attain a random FSEL Function Select Input state the master reset (MR) input allows for the EN Synchronous Enable synchronization of the internal dividers, as well as for multiple SY100S838/Ls in a system. MR Master Reset VBB Reference Output Q0, Q1 Differential 1 or 2 Outputs Q2, Q3 Differential 2/3 or 4/6 Outputs DIVSEL Frequency Select Input Precision Edge is a registered trademark of Micrel, Inc. Rev.: G Amendment: /0 M9999-113006 1 Issue Date: November 2006 hbwhelp micrel.com or (408) 955-1690VCC Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 VEE 20 19 18 17 16 15 14 13 12 11 TOP VIEW SOIC Z20-1 1 2 3 4 5 6 7 8 9 10 VCC EN DIVSEL CLK CLK VBB MR VCC NC FSEL Precision Edge SY100S838 Micrel, Inc. SY100S838L PACKAGE/ORDERING INFORMATION Ordering Information Package Operating Package Lead Part Number Type Range Marking Finish SY100S838ZC Z20-1 Commercial SY100S838ZC Sn-Pb (1) SY100S838ZCTR Z20-1 Commercial SY100S838ZC Sn-Pb SY100S838LZC Z20-1 Commercial SY100S838LZC Sn-Pb (1) SY100S838LZCTR Z20-1 Commercial SY100S838LZC Sn-Pb SY100S838ZI Z20-1 Industrial SY100S838ZI Sn-Pb (1) SY100S838ZITR Z20-1 Industrial SY100S838ZI Sn-Pb SY100S838LZI Z20-1 Industrial SY100S838LZI Sn-Pb (1) SY100S838LZITR Z20-1 Industrial SY100S838LZI Sn-Pb (2) SY100S838ZG Z20-1 Industrial SY100S838ZG with NiPdAu Pb-Free bar-line indicator Pb-Free (1, 2) SY100S838ZGTR Z20-1 Industrial SY100S838ZG with NiPdAu Pb-Free bar-line indicator Pb-Free (2) SY100S838LZG Z20-1 Industrial SY100S838LZG with NiPdAu Pb-Free bar-line indicator Pb-Free (1, 2) 20-Pin SOIC (Z20-1) SY100S838LZGTR Z20-1 Industrial SY100S838LZG with NiPdAu Pb-Free bar-line indicator Pb-Free Notes: 1. Tape and Reel. 2. Pb-Free package is recommended for new designs. M9999-113006 2 hbwhelp micrel.com or (408) 955-1690