SY54020R
Low Voltage 1.2V/1.8V/2.5V CML 1:4 Fanout
Buffer with /EN and Fail-Safe Input
3.2Gbps, 2.5GHz
General Description
The SY54020R is a fully differential, low voltage
Precision Edge
1.2V/1.8V/2.5V CML 1:4 Fanout Buffer with active-low
Enable (/EN) and Fail-Safe Input (FSI). The Enable is Features
synchronous so that the outputs will only be
1.2V/1.8V/2.5V CML 1:4 Fanout Buffer with FSI
enabled/disabled when they are already in the LOW
Active-low Enable (/EN) input to disable the outputs
state. This avoids any chance of generating a runt clock
pulse when the device is enabled/disabled as can Guaranteed AC performance over temperature and
happen with an asynchronous control. When this device voltage:
is used as a clock fanout, disabling the downstream
DC-to > 3.2Gbps Data throughput
clock may reduce system power. FSI is a special circuit
DC-to > 2.5GHz Clock throughput
designed to sense the amplitude of the input signal and
<400 ps propagation delay (IN-to-Q)
to latch the output when an invalid or no signal is
<20ps within-device skew
present at the input. The SY54020R can process clock
<100 ps rise/fall times
signals up to 2.5 GHz or data patterns up to 3.2Gbps.
Ultra-low jitter design
The differential input includes Micrels unique, 3-pin
input termination architecture that interfaces to LVPECL,
<1ps cycle-to-cycle jitter
RMS
LVDS or CML differential signals as small as 100mV
High-speed CML outputs
(200mV ) without any level-shifting or termination
pp
2.5V 5% V , 1.2/1.8V/2.5V 5% V power supply
CC CCO
resistor networks in the signal path. For AC-coupled
operation
input interface applications, an internal voltage
Industrial temperature range: 40C to +85C
reference is provided to bias the V pin. The outputs are
T
CML, with extremely fast rise/fall times guaranteed to be Available in 16-pin (3mm x 3mm) MLF package
less than 100ps.
Applications
The SY54020R operates from a 2.5V 5% core supply
and a 1.2V, 1.8V or 2.5V 5% output supply and is
SONET clock and data distribution
guaranteed over the full industrial temperature range
Fibre Channel clock and data distribution
(40C to +85C).
Gigabit Ethernet clock and data distribution
Datasheets and support documentation can be found on
.
Micrels web site at: www.micrel.com
Markets
Storage
Functional Block Diagram
ATE
Test and measurement
Enterprise networking equipment
High-end servers
Access
Metro area network equipment
Precision Edge is a registered trademark of Micrel, Inc.
MLF and MicroLeadFrame are registered trademarks of Amkor Technology.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. SY54020R
(1)
Ordering Information
Part Number Package Operating Package Marking Lead
Type Range Finish
SY54020RMG MLF-16 Industrial 020R with Pb-Free NiPdAu
bar-line indicator Pb-Free
(2)
SY54020RMGTR MLF-16 Industrial 020R with Pb-Free NiPdAu
bar-line indicator Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at T = 25C, DC Electricals only.
A
2. Tape and Reel.
Pin Configuration
16-Pin MLF (MLF-16)
M9999-041409-A
April 2009 2
hbwhelp@micrel.com or (408) 955-1690