7GHz, 1:2 CML FANOUT SY58011U Micrel, Inc. Precision Edge BUFFER/TRANSLATOR WITH SY58011U INTERNAL I/O TERMINATION FEATURES - Precision 1:2, 400mV CML fanout buffer Precision Edge - Low jitter performance: 49fs phase jitter (typ) RMS DESCRIPTION - Guaranteed AC performance over temperature/ voltage: The SY58011U is a 2.5V/3.3V precision, high-speed, fully > 7GHz f clock differential 1:2 CML fanout buffer. Optimized to provide two MAX identical output copies with less than 15ps of skew and only < 60ps t /t times r f 49fs phase jitter, the SY58011U can process clock RMS < 250ps t pd signals as fast as 7GHz or data patterns up to 10.7Gbps. < 15ps max. skew The differential input includes Micrels unique, 3-pin input - Accepts an input signal as low as 100mV termination architecture that interfaces to LVPECL, LVDS, - Unique input termination and V pin accepts DC- or CML differential signals, (AC-coupled or DC-coupled) as T coupled and AC-coupled differential small as 100mV without any level-shifting or termination inputs: LVPECL, LVDS, and CML resistor networks in the signal path. For AC-coupled input interface applications, an on-board output reference voltage - 50ohms source terminated CML outputs (V -AC) is provided to bias the V pin. The outputs are REF T - Power supply 2.5V 5% and 3.3V 10% compatible with 400mV typical swing into 50ohms loads, - Industrial temperature range: 40C to +85C with extremely fast rise/fall times guaranteed to be less than - Available in 16-pin (3mm 3mm) QFN package 60ps. The SY58011U operates from a 2.5V 5% supply or 3.3V 10% supply and is guaranteed over the full industrial United States Patent No. RE44,134 temperature range (40C to +85C). For applications that require LVPECL outputs, consider the SY58012U or SY58013U 1:2 fanout buffer with 800mV and 400mV output APPLICATIONS swing, respectively. The SY58011U is part of Micrels high- speed, Precision Edge product line. Datasheets and - All SONET and GigE clock distribution support documentation can be found on Micrels web site at - Fibre Channel clock and data distribution www.micrel.com. - Backplanes - Data distribution: OC-48, OC-48+FEC, XAUI - High-end, low skew, multiprocessor synchronous clock distribution TYPICAL PERFORMANCE 2GHz Output FUNCTIONAL BLOCK DIAGRAM V = 2.5V CC Q0 IN /Q0 50 V T 50 /IN Q1 TIME (70ps/div.) /Q1 V -AC REF 2GHz with 100mV Input Precision Edge is a registered trademark of Micrel, Inc. Rev.: G Amendment: /0 M9999-110311 1 1 Issue Date: November 2011 hbwhelp micrel.com or (408) 955-1690 Output Swing (100mV/div.)SY58011U Micrel, Inc. PACKAGE/ORDERING INFORMATION (1) Ordering Information Package Operating Package 16 15 14 13 Part Number Type Range Marking 1 12 IN Q0 (3) SY58011UMG QFN-16 Industrial 011U with VT 2 11 /Q0 Pb-Free Pb-Free bar-line indicator 3 10 /Q1 VREF-AC (2, 3) SY58011UMGTR QFN-16 Industrial 011U with /IN 4 9 Q1 Pb-Free Pb-Free bar-line indicator 5 6 7 8 Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25C, DC electricals only. A All devices are Pb-Free. 2. Tape and Reel. 16-Pin QFN (QFN-16) 3. Pb-Free package recommended for new designs. PIN DESCRIPTION Pin Number Pin Name Pin Function 1, 4 IN, /IN Differential Input: This input pair is the signal to be buffered. Each pin of this pair internally terminates with 50ohms to the V pin. Note that this input will default to an T indeterminate state if left open. See Input Interface Applications section. 2 VT Input Termination Center-Tap: Each input terminates to this pin. The V pin provides a T center-tap for each input (IN, /IN) to a termination network for maximum interface flexibility. See Input Interface Applications section. 3 VREF-AC Reference Output Voltage: This output biases to V 1.2V. It is used when AC-coupling CC the inputs (IN, /IN). Connect V -AC directly to the V pin. Bypass with 0.01F low ESR REF T capacitor to V . Maximum current source or sink is 0.5mA. See Input Interface Applica CC tions section. 5, 8, 13, 16 VCC Positive Power Supply: Bypass with 0.1 F//0.01F low ESR capacitors as close to the V pins as possible. CC 6, 7, 14, 15 GND, Ground. Exposed pad must be connected to a ground plane that is the same potential (Exposed Pad) as the ground pin. 12, 11 Q0, /Q0, CML Differential Output Pairs: Differential buffered output copy of the input signal. The 9, 10 Q1, /Q1 output swing is typically 400mV. Unused output pairs may be left floating with no impact on jitter. See CML Output Termination section. M9999-110311 2 hbwhelp micrel.com or (408) 955-1690 VCC VCC GND GND GND GND VCC VCC