Supertex inc. VN2406 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description Free from secondary breakdown This enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertexs well-proven, silicon- Low power drive requirement gate manufacturing process. This combination produces a Ease of paralleling device with the power handling capabilities of bipolar transistors Low C and fast switching speeds ISS and the high input impedance and positive temperature Excellent thermal stability coefficient inherent in MOS devices. Characteristic of all Integral source-drain diode MOS structures, this device is free from thermal runaway and High input impedance and high gain thermally-induced secondary breakdown. Applications Supertexs vertical DMOS FETs are ideally suited to a wide Motor controls range of switching and amplifying applications where very Converters low threshold voltage, high breakdown voltage, high input Amplifiers impedance, low input capacitance, and fast switching speeds are desired. Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Ordering Information R I Package DS(ON) D(ON) BV /BV DSS DGS Device (max) (min) (V) TO-92 () (A) VN2406 VN2406L-G 240 6.0 1.0 For packaged products, -G indicates package is RoHS compliant (Green). Consult factory for die / wafer form part numbers. Refer to Die Specification VF25 for layout and dimensions. Absolute Maximum Ratings Pin Configuration Parameter Value Drain-to-source voltage BV DSS Drain-to-gate voltage BV DRAIN DGS SOURCE Gate-to-source voltage 20V O O Operating and storage temperature -55 C to +150 C GATE Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous TO-92 (L) operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Product Marking Si VN YY = Year Sealed 2406L WW = Week Sealed YYWW = Green Packaging Package may or may not include the following marks: Si or TO-92 (L) Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com VN2406 Thermal Characteristics I I Power Dissipation D D I I jc ja DR DRM O Package (continuous) (pulsed) T = 25 C O O C ( C/W) ( C/W) (mA) (A) (mA) (A) (W) TO-92 190 1.7 1.0 125 170 190 1.7 Notes: I (continuous) is limited by max rated T . D j O Electrical Characteristics (T = 25 C unless otherwise specified) A Sym Parameter Min Typ Max Units Conditions BV Drain-to-source breakdown voltage 240 - - V V = 0V, I = 100A DSS GS D V Gate threshold voltage 0.8 - 2.0 V V = V , I = 1.0mA GS(th) GS DS D I Gate body leakage - - 100 nA V = 20V, V = 0V GSS GS DS - - 10 V = 0V, V = 120V GS DS I Zero gate voltage drain current A V = 0V, V = 120V, DSS GS DS - - 500 T = 125C A I On-state drain current 1.0 - - A V = 10V, V = 15V D(ON) GS DS - - 10 V = 2.5V, I = 100mA GS D R Static drain-to-source on-state resistance DS(ON) - - 6.0 V = 10V, I = 500mA GS D O R Change in R with temperature - 1.0 1.4 %/ C V = 10V, I = 500mA DS(ON) DS(ON) GS D G Forward transductance 300 - - mmho V = 10V, I = 500mA FS DS D C Input capacitance - - 125 ISS V = 0V, GS C Common source output capacitance - - 50 pF V = 25V, OSS DS f = 1.0MHz C Reverse transfer capacitance - - 20 RSS t Rise time - - 8.0 r V = 60V, t Turn-on delay time - - 8.0 DD d(ON) ns I = 400mA, D t Fall time - - 24 f R = 25 GEN t Turn-off delay time - - 23 d(OFF) V Diode forward voltage drop - 1.2 - V V = 0V, I = 800mA SD GS SD Notes: O 1. All D.C. parameters 100% tested at 25 C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit V DD 10V 90% R L INPUT Pulse Generator 10% 0V OUTPUT t t (ON) (OFF) R GEN t t t t r d(OFF) f d(ON) VDD INPUT D.U.T. 10% 10% OUTPUT 0V 90% 90% Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2