MT40A256M16GE-083E IT:B Micron

4Gb: x8, x16 Automotive DDR4 SDRAM Features Automotive DDR4 SDRAM MT40A512M8, MT40A256M16 1 Options Marking Features Configuration V = V = 1.2V 60mV DD DDQ 512 Meg x 8 512M8 V = 2.5V 125mV/+250mV PP 256 Meg x 16 256M16 On-die, internal, adjustable V generation REFDQ BGA package (Pb-free) x8 1.2V pseudo open-drain I/O 78-ball (9mm x 10.5mm) Rev. B RH Refresh maximum interval time at T temperature C 78-ball (7.5mm x 11mm) Rev. F SA, AG range: FBGA package (Pb-free) x16 64ms at 40C to 85C 96-ball (9mm x 14mm) Rev. B GE 32ms at 85C to 95C 96-ball (7.5mm x 13.5mm) Rev. F LY, AD 16ms at 96C to 105C Timing cycle time 8ms at 106C to 125C 0.625ns CL = 22 (DDR4-3200) -062E 16 internal banks ( x8): 4 groups of 4 banks each 0.750ns CL = 18 (DDR4-2666) -075E 8 internal banks (x16): 2 groups of 4 banks each 0.833ns CL = 16 (DDR4-2400) -083E 8n-bit prefetch architecture Automotive grade A Programmable data strobe preambles AEC-Q100 Data strobe preamble training PPAP Command/Address latency (CAL) Operating temperature Multipurpose register read and write capability Industrial (40C T +95C) IT C Write leveling Automotive (40C T +105C) AT C Self refresh mode 3 Ultra-high (40C T +125C) UT C Low-power auto self refresh (LPASR) Revision :B :F Temperature controlled refresh (TCR) 1. Not all options listed can be combined to Notes: Fine granularity refresh define an offered product. Use the part cat- Self refresh abort alog search on 4Gb: x8, x16 Automotive DDR4 SDRAM Features Table 2: Addressing Parameter 512 Meg x 8 256 Meg x 16 Number of bank groups 4 2 Bank group address BG 1:0 BG0 Bank count per group 4 4 Bank address in bank group BA 1:0 BA 1:0 Row addressing 32K (A 14:0 ) 32K (A 14:0 ) Column addressing 1K (A 9:0 ) 1K (A 9:0 ) 1 Page size 1KB 2KB Note: 1. Page size is per bank, calculated as follows: COLBITS Page size = 2 ORG/8, where COLBIT = the number of column address bits and ORG = the number of DQ bits. Figure 1: Order Part Number Example Example Part Number: MT40A512M8RH-075E AAT:B - : Configuration Package Speed Revision MT40A Revision Configuration Mark 512 Meg x 8 512M8 :B, :F 256 Meg x 16 256M16 Package Mark Case Temperature Mark 78-ball 9.0mm x 10.5mm FBGA RH Commercial None 78-ball 7.5mm x 11.0mm FBGA SA, AG Industrial IT 96-ball 9.0mm x 14.0mm FBGA GE Automotive AT 96-ball 7.5mm x 13.5mm FBGA LY, AD Ultra-high UT Speed Grade Mark t CK = 0.625ns, CL = 22 -062E Product certification Mark t Automotive CK = 0.750ns, CL = 18 -075E A t CK = 0.833ns, CL = 16 -083E CCMTD-1725822587-10418 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2 4gb auto ddr4 sdram z90b z10B.pdf - Rev. L 03/2021 EN 2016 Micron Technology, Inc. All rights reserved.