MT41J64M16TW-093:J TR Micron

1Gb: x4, x8, x16 DDR3 SDRAM Features DDR3 SDRAM MT41J256M4 32 Meg x 4 x 8 banks MT41J128M8 16 Meg x 8 x 8 banks MT41J64M16 8 Meg x 16 x 8 banks 1 Options Marking Features Configuration V = V = 1.5V 0.075V DD DDQ 256 Meg x 4 256M4 1.5V center-terminated push/pull I/O 128 Meg x 8 128M8 Differential bidirectional data strobe 64 Meg x 16 64M16 8n-bit prefetch architecture FBGA package (Pb-free) x4, x8 Differential clock inputs (CK, CK#) 78-ball (8mm x 11.5mm) Rev. G JP 8 internal banks 78-ball (8mm x 10.5mm) Rev. J DA Nominal and dynamic on-die termination (ODT) FBGA package (Pb-free) x16 for data, strobe, and mask signals 96-ball (8mm x 14mm) Rev. G JT Programmable CAS READ latency (CL) 96-ball (8mm x 14mm) Rev. J TW POSTED CAS ADDITIVE latency (AL) Timing cycle time Programmable CAS WRITE latency (CWL) based on 938ps @ CL = 14 (DDR3-2133) -093 t CK 1.07ns @ CL = 13 (DDR3-1866) -107 Fixed burst length (BL) of 8 and burst chop (BC) of 4 1.25ns @ CL = 11 (DDR3-1600) -125 (via the mode register set [MRS]) 1.5ns @ CL = 9 (DDR3-1333) -15E Selectable BC4 or BL8 on-the-fly (OTF) 1.87ns @ CL = 7 (DDR3-1066) -187E Self refresh mode Operating temperature T of 0C to 95C C Commercial (0C T +95C) None C 64ms, 8192 cycle refresh at 0C to 85C Industrial (40C T +95C) IT C 32ms, 8192 cycle refresh at 85C to 95C Revision :G / :J Self refresh temperature (SRT) Automatic self refresh (ASR) 1. Not all options listed can be combined to Note: Write leveling define an offered product. Use the part Multipurpose register catalog search on 1Gb: x4, x8, x16 DDR3 SDRAM Features Table 2: Addressing Parameter 256 Meg x 4 128 Meg x 8 64 Meg x 16 Configuration 32 Meg x 4 x 8 banks 16 Meg x 8 x 8 banks 8 Meg x 16 x 8 banks Refresh count 8K 8K 8K Row addressing 16K (A[13:0]) 16K (A[13:0]) 8K (A[12:0]) Bank addressing 8 (BA[2:0]) 8 (BA[2:0]) 8 (BA[2:0]) Column addressing 2K (A[11, 9:0]) 1K (A[9:0]) 1K (A[9:0]) Page Size 1KB 1KB 2KB Figure 1: DDR3 Part Numbers Example Part Number: MT41J256M4DA-107:J - : MT41J Configuration Package Speed Revision :G / :J Revision Temperature Configuration Commercial 256 Meg x 4 256M4 None Industrial temperature 128 Meg x 8 128M8 IT 64 Meg x 16 64M16 Speed Grade t Package Rev. Mark -093 CK = 0.098ns, CL = 14 t 78-ball 8mm x 11.5mm FBGA G JP -107 CK = 1.07ns, CL = 13 t 78-ball 8mm x 10.5mm FBGA J DA -125 CK = 1.25ns, CL = 11 t 96-ball 8mm x 14mm FBGA G JT -15E CK = 1.5ns, CL = 9 t TW 96-ball 8mm x 14mm FBGA J -187E CK = 1.87ns, CL = 7 1. Not all options listed can be combined to define an offered product. Use the part catalog search on Note: