2Gb: x16, x32 Automotive LPDDR2 SDRAM Features Automotive LPDDR2 SDRAM MT42L128M16, MT42L64M32, MT42L64M64 Options Marking Features V : 1.2V L DD2 Ultra low-voltage core and I/O power supplies Configuration V = 1.141.30V DD2 16 Meg x 16 x 8 banks 128M16 V /V = 1.141.30V DDCA DDQ 8 Meg x 32 x 8 banks 64M32 V = 1.701.95V DD1 8 Meg x 32 x 8 banks x 2 die 64M64 Clock frequency range Device type 53310 MHz (data rate range: 106620 Mb/s/pin) LPDDR2 single die/dual die D1, D2 Four-bit prefetch DDR architecture FBGA green package Eight internal banks for concurrent operation 134-ball FBGA (10mm x TK Multiplexed, double data rate, command/address 11.5mm) inputs commands entered on every CK edge 216-ball FBGA (12mm x 12mm) LL Bidirectional/differential data strobe per byte of Timing cycle time data (DQS/DQS ) 1.875ns RL = 8 -18 Programmable READ and WRITE latencies (RL/WL) 2.5ns RL = 6 -25 Programmable burst lengths: 4, 8, or 16 3.0ns RL = 5 -3 Per-bank refresh for concurrent operation Special options On-chip temperature sensor to control self refresh Standard rate Automotive grade (Package-level A Partial-array self refresh (PASR) burn-in) Deep power-down mode (DPD) Operating temperature range Selectable output drive strength (DS) From 30C to +85C WT Clock stop capability From 40C to +85C IT RoHS-compliant, green packaging From 40C to +105C AT Revision :C Table 1: Key Timing Parameters t t 1. For Fast RCD/ RP, contact factory. Note: Speed Clock Rate Data Rate t t 1 Grade (MHz) (Mb/s/pin) RL WL RCD/ RP -18 533 1066 8 4 Typical -25 400 800 6 3 Typical -3 333 667 5 2 Typical PDF: 09005aef8597bf6f Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 2gb automotive lpddr2 u89n.pdf - Rev. B 08/14 EN 2014 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.2Gb: x16, x32 Automotive LPDDR2 SDRAM Features Table 2: Single Channel, Single Rank S4 Configuration Addressing Architecture 128 Meg x 16 64 Meg x 32 Die CS0 16 Meg x 16 x 8 banks 8 Meg x 32 x 8 banks configuration CS1 n/a n/a Row addressing 16K (A 13:0 ) 16K (A 13:0 ) Column CS0 1K (A 9:0 ) 512K (A 8:0 ) addressing CS1 n/a n/a Number of die 1 1 Die per rank CS0 1 1 CS1 0 0 on page Ranks per channel 11 Figure 1: 2Gb LPDDR2 Part Numbering MT 42 L 128M16 D1 GU -25A:WTC Micron Technology Design Revision :C = First generation Product Family Operating Temperature 42 = Mobile LPDDR2 SDRAM WT = 30C to +85C IT = 40C to +85C Operating Voltage AT = 40C to +105C L = 1.2V Special Options A = Automotive grade Configuration 128M16 = 128 Meg x 16 Cycle Time 64M32 = 128 Meg x 32 t -18 = 1.875ns, CK RL = 8 64M64 = 64 Meg x 64 t -25 = 2.5ns, CK RL = 6 t -3 = 3.0ns, CK RL = 5 Device Type Package Codes D1 = LPDDR2 single-die TK = FBGA 134-ball 10 x 11.5 D2 = LPDDR2 dual-die LL = FBGA 216-ball 12 x 12 FBGA Part Marking Decoder Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the part number. Microns FBGA part marking decoder is available at www.micron.com/decoder. Table 3: Package Codes and Descriptions Package Code BGA SB Package-Z MTG Number TK 168-ball SAC 305 0.7 MTG-1038 LL 216-ball SAC 305 0.8 MTG-832 PDF: 09005aef8597bf6f Micron Technology, Inc. reserves the right to change products or specifications without notice. 2 2gb automotive lpddr2 u89n.pdf - Rev. B 08/14 EN 2014 Micron Technology, Inc. All rights reserved.