2Gb: x8, x16 Automotive DDR2 SDRAM Features Automotive DDR2 SDRAM MT47H256M8 32 Meg x 8 x 8 banks MT47H128M16 16 Meg x 16 x 8 banks 1 Options Marking Features Configuration Industrial and automotive temperature compliant 256 Meg x 8 (32 Meg x 8 x 8 banks) 256M8 V = 1.8V 0.1V, V = 1.8V 0.1V DD DDQ 128 Meg x 16 (16 Meg x 16 x 8 banks) 128M16 JEDEC-standard 1.8V I/O (SSTL 18-compatible) FBGA package (Pb-free) x8 60-ball FBGA (9mm x 11.5mm) EB Differential data strobe (DQS, DQS ) option FBGA package (Pb-free) x16 4n-bit prefetch architecture 84-ball FBGA (9mm x 12.5mm) RT Duplicate output strobe (RDQS) option for x8 FBGA package (lead solder) x16 DLL to align DQ and DQS transitions with CK 84-ball FBGA (9mm x 12.5mm) PK 8 internal banks for concurrent operation Timing cycle time Programmable CAS latency (CL) 2.5ns CL = 5 (DDR2-800) -25E 3.0ns CL = 5 (DDR2-667) -3 Posted CAS additive latency (AL) t Self refresh WRITE latency = READ latency - 1 CK Standard None Programmable burst lengths (BL): 4 or 8 Operating temperature Adjustable data-output drive strength Industrial (40C T +95C AIT C 32ms, 8192-cycle refresh 40C T +85C) A On-die termination (ODT) Automotive (40C T , T AAT C A +105C) RoHS-compliant Revision :C Supports JEDEC clock jitter specification 1. Not all options listed can be combined to AEC-Q100 Note: define an offered product. Use the Part PPAP submisson Catalog Search on www.micron.com for 8D response time product offerings and availability. Table 1: Key Timing Parameters Data Rate (MT/s) t Speed Grade CL = 3 CL = 4 CL = 5 CL = 6 CL = 7 RC (ns) -25E n/a 533 800 800 n/a 55 -25 n/a 533 667 800 n/a 55 -3 400 533 667 n/a n/a 55 PDF: 09005aef8441c566 Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 2gbddr2 ait aat.pdf Rev. D 10/11 EN 2011 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.2Gb: x8, x16 Automotive DDR2 SDRAM Features Table 2: Addressing Parameter 256 Meg x 8 128 Meg x 16 Configuration 32 Meg x 8 x 8 banks 16 Meg x 16 x 8 banks Refresh count 8K 8K Row address A 14:0 (16K) A 13:0 (16K) Bank address BA 2:0 (8) BA 2:0 (8) Column address A 9:0 (1K) A 9:0 (1K) Figure 1: 2Gb DDR2 Part Numbers Example Part Number: MT47H128M16RT-25E :C - : MT47H Configuration Package Speed Revision :C Revision AIT Automotive industrial temperature Configuration 256 Meg x 8 256M8 AAT Automotive temperature 128 Meg x 16 128M16 Speed Grade t Package -25E CK = 2.5ns, CL = 5 Pb-free t -3 CK = 3ns, CL = 5 60-ball 9mm x 11.5mm FBGA EB 84-ball 9mm x 12.5mm FBGA RT Lead solder 84-ball 9mm x 12.5mm FBGA PK 1. Not all speeds and configurations are available in all packages. Note: FBGA Part Number System Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the part number. For a quick conversion of an FBGA code, see the FBGA Part Marking Decoder on Microns Web site: