74LV07ATPWJ Nexperia

74LV07AT Hex buffer with open-drain outputs Rev. 1 19 December 2016 Product data sheet 1. General description The 74LV07AT is a hex buffer with open-drain outputs. The outputs are open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Designed to operate over a V range from 4.5 V to 5.5 V, the inputs are TTL compatible, CC which allows the device to be used to translate from 3.3 V to 5 V. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial Power-down applications using I . OFF The I circuitry disables the output, preventing the damaging backflow current through OFF the device when it is powered down. 2. Features and benefits Direct interface with TTL levels Supply voltage range from 4.5 V to 5.5 V Typical t of 3.5 ns at 5 V PZL Typical V < 0.8 V at V = 5 V, T = 25 C OL(p) CC amb Supports mixed-mode voltage operation on all ports I circuitry provides partial Power-down mode operation OFF Latch-up performance exceeds 250 mA per JESD 78 Class II ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3 kV MM JESD22-A115-A exceeds 150 V CDM JESD22-C101E exceeds 2 kV Specified from 40 C to +85 C and from 40 C to +125 C74LV07AT Nexperia Hex buffer with open-drain outputs 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV07ATPW 40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 4. Functional diagram < < < < < < < < < < < < < QD P D PQ QD P Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram for one gate 5. Pinning information 5.1 Pinning 7 9 / 9 < < < < < *1 < DDD Fig 4. Pin configuration TSSOP14 74LV07AT All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 1 19 December 2016 2 of 12 && *1