BCM56DSX Nexperia

BCM56DS 80 V, 1 A NPN/NPN matched double transistors 10 April 2018 Product data sheet 1. General description NPN/NPN matched double transistors in a small SOT457 (SC-74) Surface-Mounted Device (SMD) plastic package. PNP/PNP complement: BCM53DS 2. Features and benefits High collector current capability I and I C CM Reduces component count Reduces pick and place costs Current gain matching 5% Application-optimized pinout AEC-Q101 qualified 3. Applications Current mirror Differential amplifier Linear voltage regulators MOSFET drivers High-side switches Power management Amplifiers 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit Per transistor V collector-emitter open base - - 80 V CEO voltage I collector current - - 1 A C I peak collector current single pulse t 1 ms - - 2 A CM p h DC current gain V = 2 V I = 150 mA T = 25 C 1 63 - 250 FE CE C amb Per device h /h DC current gain V = 5 V I = 2 mA T = 25 C 0.95 1 1.05 FE1 FE2 CE C amb matchingNexperia BCM56DS 80 V, 1 A NPN/NPN matched double transistors Symbol Parameter Conditions Min Typ Max Unit V V base-emitter voltage 2 - - 2 mV BE1 BE2 matching 1 Pulse test: t 300 s 0.02 p 2 The smaller of the two values is subtracted from the larger value. 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 6 5 4 C1 E1 E2 1 B1 base TR1 TR1 2 B2 base TR2 TR2 3 C2 collector TR2 1 2 3 4 E2 emitter TR2 B1 B2 C2 TSOP6 (SOT457) aaa-024629 5 E1 emitter TR1 6 C1 collector TR1 6. Ordering information Table 3. Ordering information Type number Package Name Description Version BCM56DS TSOP6 plastic, surface-mounted package (SC-74) SOT457 7. Marking Table 4. Marking codes Type number Marking code BCM56DS 3D BCM56DS All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2018. All rights reserved Product data sheet 10 April 2018 2 / 13