BSH202 Nexperia

Philips Semiconductors Product specification P-channel enhancement mode BSH202 MOS transistor FEATURES SYMBOL QUICK REFERENCE DATA s Low threshold voltage V = -30 V DS Fast switching Logic level compatible I = -0.52 A D g Subminiature surface mount package R 0.9 (V = -10 V) DS(ON) GS d GENERAL DESCRIPTION PINNING SOT23 P-channel, enhancement mode, PIN DESCRIPTION logic level, field-effect power 3 transistor. This device has low 1 gate Top view threshold voltage and extremely fast switching making it ideal for 2 source battery powered applications and high speed digital interfacing. 3 drain 1 2 The BSH202 is supplied in the SOT23 subminiature surface mounting package. LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V Drain-source voltage - -30 V DS V Drain-gate voltage R = 20 k - -30 V DGR GS V Gate-source voltage - 20 V GS I Drain current (DC) T = 25 C - -0.52 A D a T = 100 C - -0.33 A a I Drain current (pulse peak value) T = 25 C - -2.1 A DM a P Total power dissipation T = 25 C - 0.417 W tot a T = 100 C - 0.17 W a T , T Storage & operating temperature - 55 150 C stg j THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT R Thermal resistance junction to FR4 board, minimum 300 - K/W th j-a ambient footprint August 1998 1 Rev 1.000Philips Semiconductors Product specification P-channel enhancement mode BSH202 MOS transistor ELECTRICAL CHARACTERISTICS T= 25C unless otherwise specified j SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V Drain-source breakdown V = 0 V I = -10 A -30 - - V (BR)DSS GS D voltage V Gate threshold voltage V = V I = -1 mA -1 -1.9 - V GS(TO) DS GS D T = 150C -0.4 - - V j R Drain-source on-state V = -10 V I = -280 mA - 0.63 0.9 DS(ON) GS D resistance V = -4.5 V I = -140 mA - 0.89 1.35 GS D V = -10 V I = -280 mA T = 150C - 0.95 1.35 GS D j g Forward transconductance V = -24 V I = -280 mA 0.2 0.7 - S fs DS D I Gate source leakage current V = 20 V V = 0 V - 10 100 nA GSS GS DS I Zero gate voltage drain V = -24 V V = 0 V - -50 -100 nA DSS DS GS current T = 150C - -0.4 -10 A j Q Total gate charge I = -0.3 A V = -15 V V = -10 V - 2.9 - nC g(tot) D DD GS Q Gate-source charge - 0.4 - nC gs Q Gate-drain (Miller) charge - 0.5 - nC gd t Turn-on delay time V = -15 V I = -0.5 A - 2 - ns d on DD D t Turn-on rise time V = -10 V R = 6 - 4.5 - ns r GS G t Turn-off delay time Resistive load - 45 - ns d off t Turn-off fall time - 20 - ns f C Input capacitance V = 0 V V = -24 V f = 1 MHz - 80 - pF iss GS DS C Output capacitance - 27 - pF oss C Feedback capacitance - 9 - pF rss REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS T = 25C unless otherwise specified j SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT I Continuous reverse drain T = 25 C - - -0.56 A DR a current I Pulsed reverse drain current - - -2.2 A DRM V Diode forward voltage I = -0.5 A V = 0 V - -0.87 -1.3 V SD F GS t Reverse recovery time I = -0.5 A -dI /dt = 100 A/s - 30 - ns rr F F Q Reverse recovery charge V = 0 V V = -24 V - 28 - nC rr GS R August 1998 2 Rev 1.000