PQMD3Z Nexperia

PQMD3 NPN/PNP resistor-equipped transistors R1 = 10 k, R2 = 10 k 26 October 2015 Product data sheet 1. General description NPN/PNP double Resistor-Equipped Transistors (RET) in a leadless ultra small DFN1010B-6 (SOT1216) Surface-Mounted Device (SMD) plastic package. NPN/NPN complement: PQMH11 PNP/PNP complement: PQMB11 2. Features and benefits 100 mA output current capability Built-in bias resistors Simplifies circuit design Low package height of 0.37 mm Reduces component count Reduces pick and place costs AEC-Q101 qualified 3. Applications Low current peripheral driver Control of IC inputs Replaces general-purpose transistors in digital applications Mobile applications 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit Per transistor for the PNP transistor with negative polarity V collector-emitter open base - - 50 V CEO voltage I output current - - 100 mA O Per transistor for the PNP transistor with negative polarity R1 bias resistor 1 T = 25 C 1 7 10 13 k amb R2/R1 bias resistor ratio 1 0.8 1 1.2 1 See sectionTest informatio for resistor calculation and test conditions.Nexperia PQMD3 NPN/PNP resistor-equipped transistors R1 = 10 k, R2 = 10 k 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol O1 I2 GND2 1 GND1 GND (emitter) TR1 1 6 7 2 I1 input ( base) TR1 R1 R2 3 O2 output (collector) TR2 2 5 TR2 4 GND2 GND (emitter) TR2 TR1 8 3 4 R2 R1 5 I2 input ( base) TR2 6 O1 output (collector) TR1 Transparent top view GND1 I1 O2 7 O1 output (collector) TR1 DFN1010B-6 (SOT1216) aaa-007379 8 O2 output (collector) TR2 6. Ordering information Table 3. Ordering information Type number Package Name Description Version PQMD3 DFN1010B-6 DFN1010B-6: plastic thermal enhanced ultra thin small SOT1216 outline package no leads 6 terminals PQMD3 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet 26 October 2015 2 / 17