74ABT646ADB,112 NXP

74ABT646A Octal bus transceiver/register 3-state Rev. 03 15 March 2010 Product data sheet 1. General description The 74ABT646A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT646A transceiver/register consists of bus transceiver circuits with 3-state outputs, D-type ip-ops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A bus or B bus will be clocked into the registers as the appropriate clock pin (CPAB or CPBA) goes HIGH. Output Enable (OE) and Direction (DIR) pins are provided to control the transceiver function. In the transceiver mode, data present at the high-impedance port may be stored in either the A or B register or both. The Select (SAB, SBA) pins determine whether data is stored or transferred through the device in real-time. The DIR pin determines which bus receives data when OE is active (LOW). In isolation mode (OE = HIGH), data from bus A may be stored in the B register and/or data from bus B may be stored in the A register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The examples in Figure 5 Real time bus transfer and storage on page 6 demonstrate the four fundamental bus management functions that can be performed with the 74ABT646A. 2. Features and benets n Combines 74ABT245 and 74ABT373A type functions in one device n Independent registers for A and B buses n Multiplexed real-time and stored data n Live insertion and extraction permitted n Output capability: +64 mA to - 32 mA n Power-up 3-state n Power-up reset n Latch-up protection exceeds 500 mA per JESD78B class II level A n ESD protection: u HBM JESD22-A114F exceeds 2000 V u MM JESD22-A115-A exceeds 200 V74ABT646A NXP Semiconductors Octal bus transceiver/register 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature Name Description Version range 74ABT646AD - 40 C to +85 C SO24 plastic small outline package 24 leads body width 7.5 mm SOT137-1 74ABT646ADB - 40 C to +85 C SSOP24 plastic shrink small outline package 24 leads SOT340-1 body width 5.3 mm 74ABT646APW - 40 C to +85 C TSSOP24 plastic thin shrink small outline package 24 leads SOT355-1 body width 4.4 mm 4. Functional diagram 21 G3 3EN1 BA 3 3EN2 AB 22 G6 456789 10 11 2 G7 23 C4 A0 A1 A2 A3 A4 A5 A6 A7 1 C5 1 CPAB 2 SAB 20 4 1 6 4D 3 DIR 1 6 1 23 CPBA 5D 7 1 22 SBA 2 17 21 OE 519 B0 B1 B2 B3 B4 B5 B6 B7 618 717 20 19 18 17 16 15 14 13 816 001aae891 915 10 14 11 13 001aae892 Fig 1. Logic symbol Fig 2. IEC logic symbol 74ABT646A 3 All information provided in this document is subject to legal disclaimers. NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 15 March 2010 2 of 19