74ABT827PW NXP

74ABT827 10-bit buffer/line driver non-inverting 3-state Rev. 5 7 November 2011 Product data sheet 1. General description The 74ABT827 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT827 10-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NOR Output Enables (OE0, OE1) for maximum control flexibility. 2. Features and benefits Ideal where high speed, light loading, or increased fan-in are required Flow-through pinout architecture for microprocessor oriented applications Output capability: +64 mA and 32 mA Power-up 3-state Inputs are disabled during 3-state mode Latch-up protection exceeds 500 mA per JESD78B class II level A ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74ABT827D 40 C to +85 C SO24 plastic small outline package 24 leads body width SOT137-1 7.5 mm 74ABT827DB 40 C to +85 C SSOP24 plastic shrink small outline package 24 leads body SOT340-1 width 5.3 mm 74ABT827PW 40 C to +85 C TSSOP24 plastic thin shrink small outline package 24 leads SOT355-1 body width 4.4 mm74ABT827 NXP Semiconductors 10-bit buffer/line driver non-inverting 3-state 4. Functional diagram 1 & EN1 13 23456789 10 11 2 23 1 322 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 421 1 OE0 520 13 OE1 619 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 718 23 22 21 20 19 18 17 16 15 14 817 001aae885 916 10 15 11 14 001aae886 Fig 1. Logic symbol Fig 2. IEEE/IEC logic symbol A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 2345678910 11 1 OE0 13 OE1 23 22 21 20 19 18 17 16 15 14 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 001aae887 Fig 3. Logic diagram 74ABT827 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 5 7 November 2011 2 of 14