74AUP1T34GM NXP

74AUP1T34 Low-power dual supply translating buffer Rev. 6 28 January 2019 Product data sheet 1. General description The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track V . Output Y is designed to track V . Both, V and V accepts any supply CC(A) CC(Y) CC(A) CC(Y) voltage from 1.1 V to 3.6 V. This feature allows universal low voltage interfacing between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire V range from 1.1 V to 3.6 V. This device ensures a very low static and dynamic CC power consumption across the entire V range from 1.1 V to 3.6 V. This device is fully specified CC for partial power-down applications using I . The I circuitry disables the output, preventing the OFF OFF damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.1 V to 3.6 V High noise immunity Complies with JEDEC standards: JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Wide supply voltage range: V : 1.1 V to 3.6 V CC(A) V : 1.1 V to 3.6 V CC(Y) Low static power consumption; I = 0.9 A (maximum) CC Each port operates over the full 1.1 V to 3.6 V power supply range Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF Multiple package options Specified from -40 C to +85 C and -40 C to +125 CNexperia 74AUP1T34 Low-power dual supply translating buffer 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1T34GW -40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; SOT353-1 body width 1.25 mm 74AUP1T34GM -40 C to +125 C XSON6 plastic extremely thin small outline package; SOT886 no leads; 6 terminals; body 1 1.45 0.5 mm 74AUP1T34GF -40 C to +125 C XSON6 plastic extremely thin small outline package; SOT891 no leads; 6 terminals; body 1 1 0.5 mm 74AUP1T34GN -40 C to +125 C XSON6 extremely thin small outline package; no leads; SOT1115 6 terminals; body 0.9 1.0 0.35 mm 74AUP1T34GS -40 C to +125 C XSON6 extremely thin small outline package; no leads; SOT1202 6 terminals; body 1.0 1.0 0.35 mm 74AUP1T34GX -40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely SOT1226 thin small outline package; no leads; 5 terminals; body 0.8 0.8 0.35 mm 4. Marking Table 2. Marking Type number Marking code [1] 74AUP1T34GW pQ 74AUP1T34GM pQ 74AUP1T34GF pQ 74AUP1T34GN pQ 74AUP1T34GS pQ 74AUP1T34GX pQ [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram A Y A Y 001aac538 001aac537 001aac536 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 74AUP1T34 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 6 28 January 2019 2 / 22