74HCT126N NXP

74HC126; 74HCT126 Quad buffer/line driver; 3-state Rev. 4 1 December 2015 Product data sheet 1. General description The 74HC126; 74HCT126 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Inverting outputs Complies with JEDEC standard no. 7A Input levels: For 74HC126: CMOS level For 74HCT126: TTL level ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC126D 40 C to +125 C SO14 plastic small outline package; 14 leads; SOT108-1 body width 3.9 mm 74HCT126D 74HC126DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; SOT337-1 body width 5.3 mm 74HCT126DB 74HC126PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm 74HCT126PW74HC126; 74HCT126 Nexperia Quad buffer/line driver; 3-state 4. Functional diagram  $ <     (    $ <     (  $ <      (   $ <   (   DP Q DP Q Fig 1. Logic symbol Fig 2. IEC logic symbol Q$ Q2(  D  Fig 3. Logic diagram (one buffer/line driver) 5. Pinning information 5.1 Pinning +& +&7 2(  9 +& +&7   $ 2(   2( 9  <     $ 2( 2(  <     < $    $  2( 2(  <    $ 2(  <     <  $    *1' <  *1'  <  DDD DDD Fig 4. Pin configuration for SOT108-1 Fig 5. Pin configuration for SOT337-1 and SOT402-1 74HC_HCT126 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 4 1 December 2015 2 of 15 $   && $   &&  PQ Q< 2  2 2 (1 2