74HCT7540N,112 NXP

74HC7540 74HCT7540 Octal Schmitt trigger buffer/line driver 3-state inverting Rev. 4 31 December 2012 Product data sheet 1. General description The 74HC7540 74HCT7540 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74HC7540 74HCT7540 provides eight inverting buffer/line drivers with 3-state outputs and Schmitt-trigger action. The 3-state outputs are controlled by the output enable inputs OE1 and OE2. A HIGH on OEn causes the outputs to assume a high-impedance OFF-state. Schmitt trigger action on the data inputs transforms slowly changing input signals into sharply defined, jitter-free output signals. The 74HC7540 74HCT7540 is identical to the 74HC540 74HCT540 but has hysteresis on the data inputs. 2. Features and benefits Inverting outputs Low-power dissipation ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC7540N 40 Cto +125 C DIP20 plastic dual in-line package 20 leads (300 mil) SOT146-1 74HCT7540N 74HC7540D 40 C to +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74HCT7540D 74HC7540DB 40 C to +125 C SSOP20 plastic shrink small outline package 20 leads SOT339-1 body width 5.3 mm74HC7540 74HCT7540 NXP Semiconductors Octal Schmitt trigger buffer/line driver 3-state inverting 4. Functional diagram Fig 1. Logic symbol Fig 2. IEC logic symbol 5. Pinning information 5.1 Pinning Fig 3. Pin configuration DIP20, SO20 Fig 4. Pin configuration SSOP20 74HC HCT7540 All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 4 31 December 2012 2 of 16