74LVC162244ADGG11 NXP

74LVC162244A 74LVCH162244A 16-bit buffer/line driver 30 series termination resistors 5 V tolerant input/output 3-state Rev. 6 16 December 2011 Product data sheet 1. General description The 74LVC162244A 74LVCH162244A are 16-bit non-inverting buffer/line drivers with 3-state bus compatible outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. It features four output enable inputs, (1OE to 4OE) each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. The device is designed with 30 series termination resistors in both HIGH and LOW output stages to reduce line noise. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications. The 74LVCH162244A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs. 2. Features and benefits 5 V tolerant inputs/outputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Multibyte flow-through standard pin-out architecture Low inductance multiple power and ground pins for minimum noise and ground bounce Direct interface with TTL levels High-impedance when V =0V CC All data inputs have bus hold. (74LVCH162244A only) Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from 40 Cto+85 C and 40 Cto+125 C74LVC162244A 74LVCH162244A NXP Semiconductors 16-bit buffer/line driver 30 resistors 5 V tolerance 3-state 3. Ordering information Table 1. Ordering information Type number Temperature range Package Name Description Version 74LVC162244ADL 40 C to +125 C SSOP48 plastic shrink small outline package 48 leads SOT370-1 body width 7.5 mm 74LVCH162244ADL 74LVC162244ADGG 40 Cto+125 C TSSOP48 plastic thin shrink small outline package SOT362-1 48 leads body width 6.1 mm 74LVCH162244ADGG 4. Functional diagram 1 1A0 1Y0 3A0 3Y0 1OE EN1 47 2 36 13 48 2OE EN2 25 3OE EN3 1A1 1Y1 3A1 3Y1 46 3 35 14 24 4OE EN4 1A2 1Y2 3A2 3Y2 47 2 44 5 33 16 1A0 1 1 1Y0 46 3 1A1 1Y1 1A3 1Y3 3A3 3Y3 44 5 43 6 32 17 1A2 1Y2 43 6 1A3 1Y3 41 8 1OE 3OE 1 25 2A0 1 2 2Y0 40 9 2A1 2Y1 38 11 2A0 2Y0 4A0 4Y0 2A2 2Y2 41 8 30 19 37 12 2A3 2Y3 36 13 2A1 2Y1 4A1 4Y1 3A0 1 3 3Y0 40 9 29 20 35 14 3A1 3Y1 33 16 3A2 3Y2 2A2 2Y2 4A2 4Y2 38 11 27 22 32 17 3A3 3Y3 30 19 4A0 1 4 4Y0 2A3 2Y3 4A3 4Y3 37 12 26 23 29 20 4A1 4Y1 27 22 4A2 4Y2 2OE 4OE 26 23 48 24 4A3 4Y3 001aae506 001aae231 Fig 1. Logic symbol Fig 2. IEC logic symbol V CC data input to internal circuit mna705 Fig 3. Bus hold circuit 74LVC LVCH162244A All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 16 December 2011 2 of 15