CBT3257ADS,112 NXP

CBT3257A Quad 1-of-2 multiplexer/demultiplexer Rev. 5 4 April 2013 Product data sheet 1. General description The CBT3257A is a quad 1-of-2 high-speed TTL-compatible multiplexer/demultiplexer. The low ON resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. Output enable (OE) and select-control (S) inputs select the appropriate nB1 and nB2 outputs for the nA input data. The CBT3257A is characterized for operation from 40 Cto+85 C. 2. Features and benefits 5 switch connection between two ports TTL-compatible input levels Minimal propagation delay through the switch Latch-up protection exceeds 100 mA per JEDEC standard JESD78 class II level A ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from 40 Cto+85 CCBT3257A Nexperia Quad 1-of-2 multiplexer/demultiplexer 3. Ordering information Table 1. Ordering information Type number Temperature range Package Name Description Version CBT3257AD 40 Cto+85 C SO16 plastic small outline package; 16 leads; SOT109-1 body width 3.9 mm CBT3257ADB 40 Cto+85 C SSOP16 plastic shrink small outline package; 16 leads; SOT338-1 body width 5.3 mm [1] CBT3257ADS 40 Cto+85 C SSOP16 plastic shrink small outline package; 16 leads; SOT519-1 body width 3.9 mm; lead pitch 0.635 mm CBT3257APW 40 Cto+85 C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm CBT3257ABQ 40 Cto+85 C DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1 very thin quad flat package; no leads; 16 terminals; body 2.5 3.5 0.85 mm [1] Also known as QSOP16. 4. Functional diagram 4 2 1A 1B1 3 1B2 7 5 2A 2B1 6 2B2 9 11 3A 3B1 10 3B2 12 14 4A 4B1 13 4B2 1 S 15 OE 002aab779 Fig 1. Logic diagram CBT3257A All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 5 4 April 2013 2 of 17