Document Number MC9S08PB16 NXP Semiconductors Rev. 2.1, 11/2019 Data Sheet: Technical Data MC9S08PB16 MC9S08PB16 Data Sheet Supports: MC9S08PB16 and MC9S08PB8 Key features Peripherals ADC - 12-channel, 12-bit resolution 2.5 s 8-Bit S08 central processor unit (CPU) conversion time eight-level data FIFO with optional Up to 20 MHz bus at 2.7 V to 5.5 V across operating watermark automatic compare function 1.7 mV/C temperature range temperature sensor internal bandgap reference Supporting up to 30 interrupt/reset sources channel operation in stop optional hardware trigger Supporting up to four-level nested interrupt FTM - Two flex timer modulators (FTM) modules On-chip memory including one 6-channel (FTM2) and one 2-channel Up to 16 KB flash read/program/erase over full (FTM0) backward compatible with TPM modules operating voltage and temperature 16-bit counter each channel can be configured for Up to 1 KB random-access memory (RAM) input capture, output compare, edge- or center- Flash and RAM access protection aligned PWM mode Power-saving modes FDS - Shut down output pin upon fault detection One low power stop mode reduced power wait the fault sources can be optional enabled separately mode the output pin can be configured as output 1,0 and Peripheral clock enable register can disable clocks to high impedance when a fault occurs based on unused modules, reducing currents allows clocks to module configuration remain enabled to specific peripherals in stop3 mode MTIM - Two modulo timers with 8-bit prescaler and overflow interrupt Clocks PWT One pulse width timer used to captures a Internal Clock Source (ICS) Internal clock source pulse width and pulse period module containing a frequency-locked-loop (FLL) SCI - One serial communications interface (SCI/ controlled by internal or external reference UART) modules optional 13-bit break Full duplex precision trimming of internal reference allows 0.2% non-return to zero (NRZ) LIN extension support resolution 1% deviation across temperature range of I2C - One inter-integrated circuit module up to 400 0 C to 70C, 1.5% deviation across temperature kbps multi-master operation programmable slave range of 40 C to 105 C and 2% deviation across address supporting broadcast mode and 10-bit temperature range of 40 C to 125 C Up to 20 addressing supporting SMBUS MHz ACMP - Two analog comparators with both positive Oscillator (XOSC) Loop-controlled Pierce and negative inputs selectable voltage reference oscillator crystal or ceramic resonator range of provided by on-chip 6-bit DAC separately 31.25 kHz to 39.0625 kHz or 4 MHz to 20 MHz selectable interrupt on rising and falling comparator System protection output Watchdog with independent clock source OPAMP One analog amplifier (OPAMP) with Low-voltage detection with reset or interrupt fixed gain x20, supporting up to 100 mV single- selectable trip points ended input. Illegal opcode detection with reset RTC - 16-bit real timer counter (RTC) Illegal address detection with reset CRC - Cyclic Redundancy Check with programmable 16-/32-bit polynomial generator KBI Up to 8 keyboard interrupt inputs NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products. Development support Single-wire background debug interface Breakpoint capability to allow three breakpoints setting during in-circuit debugging On-chip in-circuit emulator (ICE) debug module containing two comparators and nine trigger modes Input/Output Up to 18 GPIOs including one output-only pin (PTA4) One 8-bit keyboard interrupt modules (KBI) One true open drain pin (PTB0) Package options 20-pin TSSOP 16-pin TSSOP MC9S08PB16 Data Sheet, Rev. 2.1, 11/2019 2 NXP Semiconductors