MC9S08PT16AVLD NXP

Document Number MC9S08PT16 NXP Semiconductors Rev. 4, 03/2020 Data Sheet: Technical Data MC9S08PT16 MC9S08PT16 Series Data MC9S08PT16A and MC9S08PT8A Sheet are recommended for new design Supports: MC9S08PT16(A) and MC9S08PT8(A) Key features Development support Single-wire background debug interface 8-Bit S08 central processor unit (CPU) Breakpoint capability to allow three breakpoints Up to 20 MHz bus at 2.7 V to 5.5 V across setting during in-circuit debugging temperature range of -40 C to 105 C On-chip in-circuit emulator (ICE) debug module Supporting up to 40 interrupt/reset sources containing two comparators and nine trigger modes Supporting up to four-level nested interrupt On-chip memory Peripherals Up to 16 KB flash read/program/erase over full ACMP - one analog comparator with both positive operating voltage and temperature and negative inputs separately selectable interrupt Up to 256 byte EEPROM 2-byte erase sector on rising and falling comparator output filtering program and erase while executing flash ADC - 12-channel, 12-bit resolution 2.5 s Up to 2048 byte random-access memory (RAM) conversion time data buffers with optional Flash and RAM access protection watermark automatic compare function internal bandgap reference channel operation in stop mode Power-saving modes optional hardware trigger One low-power stop mode reduced power wait CRC - programmable cyclic redundancy check mode module Peripheral clock enable register can disable clocks to FTM - two flex timer modulators modules including unused modules, reducing currents allows clocks to one 6-channel and one 2-channel ones 16-bit remain enabled to specific peripherals in stop3 mode counter each channel can be configured for input Clocks capture, output compare, edge- or center-aligned Oscillator (XOSC) - loop-controlled Pierce PWM mode oscillator crystal or ceramic resonator range of IIC - One inter-integrated circuit module up to 400 31.25 kHz to 39.0625 kHz or 4 MHz to 20 MHz kbps multi-master operation programmable slave Internal clock source (ICS) - containing a frequency- address supporting broadcast mode and 10-bit locked-loop (FLL) controlled by internal or external addressing supporting SMBUS and PMBUS reference precision trimming of internal reference MTIM - One modulo timer with 8-bit prescaler and allowing 1% deviation across temperature range of 0 overflow interrupt C to 70 C and 2% deviation across the whole RTC - 16-bit real timer counter (RTC) operating temperature up to 20 MHz SCI - two serial communication interface (SCI/ UART) modules optional 13-bit break full duplex System protection non-return to zero (NRZ) LIN extension support Watchdog with independent clock source SPI - one 8-bit serial peripheral interface (SPI) Low-voltage detection with reset or interrupt modules full-duplex or single-wire bidirectional selectable trip points master or slave mode Illegal opcode detection with reset TSI - supporting up to 16 external electrodes Illegal address detection with reset configurable software or hardware scan trigger fully support NXP touch sensing software library capability to wake MCU from stop3 mode NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products. Input/Output Up to 37 GPIOs including one output-only pin One 8-bit keyboard interrupt module (KBI) Two true open-drain output pins Four, ultra-high current sink pins supporting 20 mA source/sink current Package options 44-pin LQFP 32-pin LQFP 20-pin SOIC 20-pin TSSOP 16-pin TSSOP MC9S08PT16 Series Data Sheet, Rev. 4, 03/2020 2 NXP Semiconductors