Freescale Semiconductor Document Number: MC9S08QA4 Rev. 3, 1/2009 Data Sheet: Technical Data MC9S08QA4 8-Pin DFN 8-Pin NB-SOIC Case 1452-02 Case 751-07 MC9S08QA4 Series 8-Pin PDIP Covers: MC9S08QA4 Case 626-06 MC9S08QA2 Features: Breakpoint capability to allow single breakpoint setting during in-circuit debugging 8-bit HCS08 Central Processor Unit (CPU) Peripherals Up to 20 MHz CPU at 3.6 V to 1.8 V across temperature ADC 4-channel, 10-bit resolution 1.7 mV/C range of 40C to 85C temperature sensor automatic compare function HC08 instruction set with added BGND instruction internal bandgap reference channel operation in stop3 Support for up to 32 interrupt/reset sources fully functional from 3.6 V to 1.8 V On-Chip Memory ACMP Analog comparator with selectable interrupt Flash read/program/erase over full operating voltage on rising, falling, or either edge of comparator output and temperature compare option to fixed internal bandgap reference Random-access memory (RAM) voltage output can be tied internally to TPM input Security circuitry to prevent unauthorized access to capture RAM and flash contents TPM One 1-channel timer/pulse-width modulator Power-Saving Modes (TPM) module selectable input capture, output Two very low power stop modes compare, or buffered edge- or center-aligned PWM on Peripheral clock enable register can disable clocks to each channel ACMP output can be tied internally to unused modules, thereby reducing currents input capture Very low power real time counter for use in run, wait, MTIM 8-bit modulo timer module with 8-bit and stop modes with internal clock sources prescaler Clock Source Options KBI 4-pin keyboard interrupt module with software Internal Clock Source (ICS) Internal clock source selectable polarity on edge or edge/level modes module containing a frequency-locked-loop (FLL) Input/Output controlled by internal reference precision trimming of Four GPIOs, one input-only pin and one output-only internal reference allows 0.2% resolution and 2% pin. deviation over temperature and voltage supports bus Hysteresis and configurable pullup device on all input frequencies from 1 MHz to 10 MHz pins configurable slew rate and drive strength on all System Protection output pins except PTA5 Watchdog computer operating properly (COP) reset Package Options with option to run from dedicated 1 kHz internal clock 8-pin SOIC, PDIP, and DFN source or bus clock Low-voltage detection with reset or interrupt Selectable trip points Illegal opcode detection with reset Illegal address detection with reset Flash block protection Development Support Single-wire background debug interface This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. Freescale Semiconductor, Inc., 2008-2009. All rights reserved.Table of Contents 1 MCU Block Diagram .3 3.8 AC Characteristics 12 2 Pin Assignments 3 3.8.1 Control Timing . 13 3 Electrical Characteristics .5 3.8.2 TPM/MTIM Module Timing 14 3.1 Introduction .5 3.9 Analog Comparator (ACMP) Electricals . 15 3.2 Absolute Maximum Ratings 5 3.10 ADC Characteristics 15 3.3 Thermal Characteristics .5 3.11 Flash Specifications . 17 3.4 ESD Protection and Latch-Up Immunity .6 4 Ordering Information . 19 3.5 DC Characteristics .7 5 Mechanical Drawings 19 3.6 Supply Current Characteristics .10 3.7 Internal Clock Source (ICS) Characteristics .11 Revision History To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: